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74LS138 3-to-8 Decoder/Demultiplexer

74LS138 3-to-8 DecoderDemultiplexer

Overview

The 74LS138 is a 3-to-8 line decoder that converts 3 input lines to 8 output lines. It is an active low decoder, meaning it activates one of the 8 output lines low when a valid input code is applied to the input lines. The 74LS138 is commonly used for address decoding and other demuxing applications in digital logic circuits.

Features

  • 3-to-8 decoder with active low outputs
  • Converts 3 input lines to 8 output lines
  • Input pins: A0, A1, A2 (address inputs), G1, G2A, G2B (enable inputs)
  • Output pins: Y0-Y7
  • Wide operating voltage range: 4.5V to 5.5V
  • High noise immunity
  • Low power dissipation
  • High fanout capability
  • High speed performance

Logic Table

Below is the logic table showing the output states for different input conditions:

A2A1A0G1G2AG2BY7Y6Y5Y4Y3Y2Y1Y0
000HXXLHHHHHHH
001HXXHLHHHHHH
010HXXHHLHHHHH
011HXXHHHLHHHH
100HXXHHHHLHHH
101HXXHHHHHLHH
110HXXHHHHHHLH
111HXXHHHHHHHL

Usage

The 74LS138 is commonly used:

  • As a memory address decoder to generate chip select signals
  • For demultiplexing data/control signals
  • For 7-segment display decoding
  • In various other decoding and demuxing applications

To enable the outputs, the G1 and either G2A or G2B pins must be high. The 3 address lines (A0-A2) then select which of the 8 output pins is activated low according to the logic table.

Pinout Diagram

Below is the pinout diagram for the 16-pin DIP package:

Example Circuit

Here is a simple example circuit using the 74LS138 as an address decoder:

In this circuit, a 3-to-8 bit address bus connects to the A0-A2 pins. The G1 and G2A pins are tied high to enable the outputs. As the address changes, a different output line will be activated low according to the logic table. This can be used to selectively enable various devices.

Frequently Asked Questions

What is the difference between the 74LS138 and 74HC138?

The main difference is the technology. The 74LS138 is based on low-power Schottky TTL logic while the 74HC138 uses CMOS logic. The 74HC138 has higher noise immunity and lower power consumption.

How do I select between G2A and G2B?

The G2A and G2B pins provide two separate enable inputs. Only one needs to be high to enable the outputs. This allows two separate enable signals if needed. If only one enable is required, tie G2A high and leave G2B disconnected.

Can I connect the unused outputs together?

Yes, any unused outputs can be tied together. However, no more than 5 LS TTL inputs should be connected to an output to avoid overloading.

What is the maximum output current per pin?

Each output pin can source or sink up to 8mA. Care should be taken not to exceed this to avoid damage.

What logic family can I interface the 74LS138 outputs to?

The 74LS138 outputs are compatible with TTL, DTL, MOS, CMOS and PMOS logic families. Avoid connecting to inputs that can draw more than 8mA.