Aerospace PCB Copy for Legacy Equipment Files

If you have an aerospace board still in service and no design files for it, aerospace PCB copy is the process that gets those files back: the physical board is measured, imaged, and layer-by-layer traced into a manufacturable Gerber set, a schematic, and a BOM you can actually buy parts against. It works on boards whose original CAD data was lost, whose vendor is gone, or whose key parts went end-of-life. What follows is what the work involves, what we need from you, and the cases where the answer is “difficult” or “no.”

Why aerospace boards end up needing this more than most

Aerospace hardware outlives its own paperwork. A ground support test set, a bench-level LRU simulator, an environmental control interface card, a cabin lighting driver — these get designed once, qualified once, and then flown or used for twenty-five years. The CAD files were in a format nobody can open, on a server that got decommissioned, at a supplier that was acquired twice.

Meanwhile the fleet still needs spares. That mismatch is the whole reason this service exists. The three situations we see most often:

• Vendor exit. The original board house closed or dropped the product line, and there is no data package to hand to a new fab.
• Component obsolescence. A PLD, an isolated RS-422 transceiver, or a specific op-amp is no longer produced, and you need the netlist before you can evaluate a drop-in replacement.
• Repeat build with no source. You hold the drawings and the rights, but only in paper form, or only as an outline drawing with no copper data.

Aerospace boards also tend to be physically harder than commercial ones. Conformal coating, staked components, potted sections, mil-spec connectors with unusual footprints, sometimes polyimide substrates instead of standard FR-4. All of that changes the schedule, and we will say so before quoting rather than after.

What actually happens to the board in the lab

Intake and non-destructive capture

Before anything is removed, the board gets documented as received. High-resolution scans of both sides at known scale, photographs of every component marking including the faint laser-etched ones, X-ray if there are BGAs or if we suspect buried vias. Board outline, thickness, and connector datum positions are measured with calipers and a coordinate check, not estimated from the photos.

Conformal coating is the first real decision point. Acrylic coatings come off with solvent fairly predictably. Urethane and silicone are slower and can lift silkscreen or small passives with them, so we test a small area on the least critical corner of the board first.

Component identification and BOM build

Every part gets read, cross-referenced, and where the marking is a house number or a screened-over date code, characterized. A 1206 resistor with no marking gets measured in circuit and then out of circuit if the in-circuit value is ambiguous. Ceramic caps get an LCR reading and a voltage-rating judgment based on package size and location in the circuit — that judgment is documented as a judgment, not passed off as a datasheet fact.

For aerospace work the BOM matters more than usual, because you probably need to know whether a part was a commercial grade, an industrial grade, or a screened equivalent. We report the marking exactly as found and flag where the grade cannot be determined from the package alone.

Layer separation and copper extraction

On a two-sided board this is scanning, alignment, and tracing. On a multilayer board, inner layers have to be exposed one at a time — controlled abrasion down to each copper layer, scanning at each step, with registration holes or plated features used as the alignment reference between layers. A four-layer board with a solid ground plane and a split power plane is straightforward. An eight-layer board with fine-pitch BGA fanout, blind vias, and impedance-controlled differential pairs takes considerably longer, because every layer image has to be registered to sub-mil accuracy before the vias will line up.

Polyimide flex sections and rigid-flex transitions are their own job. The flex layers do not abrade the same way and often have to be handled separately from the rigid stack.

Netlist, schematic, and verification

The extracted copper becomes a netlist. The netlist plus the identified components becomes a schematic, drawn as functional blocks rather than as a rat’s nest that mirrors the layout — power input and filtering, isolation barrier, MCU or PLD core, analog front end, output drivers, connector pinout.

Then it gets checked backwards. We take the reconstructed netlist and continuity-test it against the physical board, net by net on the critical nets and by sampling on the bulk nets. Where the customer has a functional original, we prefer to build one board from the recovered data and compare behavior against the original at the connector. That’s the check that catches a swapped inner-layer pair, which a visual review will not.

Deliverables, and which ones you actually need

Not every project needs the full set. Choosing the right tier is the single easiest way to control cost.

If you’re unsure what the handover package looks like in practice, the detail on which files you receive from a PCB copy lays out each file type and what a fab does with it.

What to send us, and what comes back

To quote an aerospace PCB copy accurately we need surprisingly little at the start:

1. Clear photos of both sides, on a dark non-reflective background, with the whole board in frame and square to the camera. Then a few close-ups of dense areas.
2. Board dimensions — length, width, and overall thickness. A caliper reading beats a ruler.
3. Layer count if you know it, or just say unknown. We can estimate from edge inspection and X-ray.
4. The main chip markings typed out as text, including the full part number and any suffix. Photos of markings are often unreadable at the angle they were taken.
5. One line on deliverables — Gerbers only, schematic only, or the full package.
6. Anything unusual: conformal coating, potting, staking, heavy copper, flex sections, or a coating you already know is silicone.

What comes back is a feasibility assessment, a lead time, and a price. The assessment says specifically what we can and cannot get from your board, not a generic yes. If something on the board looks like it will be a problem — a marked-over PLD, a potted module, a hybrid — we name it in the quote instead of discovering it mid-project.

Projects run under NDA, and the boards stay in a controlled area of the lab. You need to hold the rights to the design or have authorization from whoever does; confirming that is on you, and complying with applicable export control and IP law applies to both sides. We don’t take work on hardware the requester has no claim to.

The parts of an aerospace board that are genuinely hard

Being straight about limits is more useful than a clean promise, so here are the recurring problem cases.

Programmable logic with no bitstream

An old CPLD or PLD sitting in the middle of an interface card is the most common blocker. If the security bit is set, the internal logic may not be readable, and the copper alone tells you only which pins connect where — not what the device does with them. Sometimes the function can be inferred from surrounding circuitry and I/O behavior, and sometimes it can’t. If your board has a marked-over PLCC44 device, mention it early, because it usually determines whether the project is a straightforward copy or a partial reconstruction.

Firmware in a locked microcontroller

Same problem, different package. A copper-level copy gives you the board, not the code. Firmware recovery from a locked device is a separate assessment with its own feasibility answer, and it depends heavily on the specific part and its protection state — read-protection levels on some ARM parts, JTAG fuse state on MSP430, lock bits on older 8-bit devices. We assess it per part number and we don’t promise a result in advance.

Potted, staked, and hybrid assemblies

Epoxy potting has to be removed mechanically or chemically and the parts underneath frequently do not survive. If the potted section is the whole functional core, tell us and we’ll be honest about the odds. Staked components are recoverable but slow.

Controlled impedance and high-frequency sections

Copying the copper geometry is not enough on an RF or high-speed section — you need the dielectric constant and layer thicknesses too. We measure cross-sections to reconstruct the stackup, and note where the original material appears to be something other than standard FR-4. That reconstruction is close, and we tell you it’s a reconstruction. Boards built from it should be impedance-coupon tested. IPC-A-600 and IPC-6012 acceptability criteria are the right yardstick for the new bare boards, and IPC-2221 gives you the design-rule baseline if any spacing has to be adjusted for a modern fab.

Very high layer counts

Layer count drives everything — cost, schedule, and risk of a registration error. The way effort scales is not linear, which is why layer count matters so much on a ten-layer copy compared to a four-layer one.

Frequently asked questions

Can you copy an aerospace board if the original still has to fly?

Layer separation is destructive, so the sample board is consumed. Send a scrapped, failed, or spare unit if you have one. If the only board you have is flight hardware, we start with non-destructive capture — scans

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