Yes, ceramic boards can be copied — but not the way FR-4 is copied. Alumina, aluminum nitride, and DBC substrates can’t be sanded layer by layer, so a ceramic PCB copy relies on high-resolution optical imaging, X-ray for buried metal and vias, careful electrical probing, and in some cases controlled fracture of a sacrificial sample. The output is the same as any other board copy: Gerbers, drill data, a netlist, a BOM, and a schematic if you want one.
Below is what actually happens in the lab, what we need from you, and where ceramic genuinely gets harder than glass-epoxy.
Why ceramic boards break the normal copy workflow
The standard approach to a multilayer FR-4 board is destructive layer separation: strip the solder mask, image the outer copper, grind down to the next layer, image again. Ceramic doesn’t cooperate. Alumina at 96% or 99.6% purity is hard, brittle, and thermally unforgiving. It doesn’t grind evenly — it chips, and a chip through a conductor destroys the very trace you needed to see.
The metallization is different too. Thick-film boards carry screen-printed silver, silver-palladium, or gold conductors fired onto the substrate, often with printed resistor inks in the same layer. Thin-film boards use sputtered TiW/Cu/Au stacks a few microns thick with line widths that go below 50 µm. DBC and AMB power substrates carry copper 0.1 to 0.4 mm thick bonded directly to the ceramic, with almost no fine detail but huge current-carrying geometry that has to be reproduced dimensionally, not approximately.
So the sequence changes. Instead of grinding first, we measure and image first, and we treat the sample as something we may only get one shot at.
What the engineer is actually looking at
- Conductor edges under coaxial and ring light. Fired silver has a rounded, slightly bled edge from the screen print. That bleed is not the design width — we back out the intended conductor from repeated measurements across the board, not from a single edge.
- Printed passives. Resistor inks look like a paste patch, sometimes laser-trimmed with a visible cut. We record the trim geometry, the measured resistance, and the sheet resistivity implied by the aspect ratio, because a copy that ignores the trim will land at the wrong value.
- Via fill. Ceramic vias are usually filled and fired, not plated barrels. Under X-ray they read as solid slugs rather than rings, which is a useful way to tell filled ceramic vias from PTH.
- Ceramic thickness and camber. 0.25, 0.38, 0.635, and 1.0 mm are common. Thickness affects both impedance and thermal behavior, so it gets measured, not assumed.
How a ceramic PCB copy runs, step by step
- Intake and documentation. Both faces get photographed at high resolution and scanned flat. Board outline, all mechanical features, mounting holes, and any castellated or wrap-around edge metallization are measured with a caliper and, where tolerance matters, on a measuring microscope.
- Component identification. Bare die on ceramic is common, and bare die has no printed part number. We work from wire-bond pad count, die size, pad map, and the surrounding circuit function. Packaged parts get read normally, including remarked or lasered top marks under angled light.
- X-ray of internals. Multilayer co-fired ceramic (HTCC/LTCC) has genuinely buried conductors. the same imaging approach we use on RF substrates applies here — oblique-angle X-ray plus layer-by-layer inference from via positions and pad shadows.
- Electrical mapping. Continuity and net tracing with fine probes on a bare or depopulated sample. On thick-film boards this is often the fastest way to confirm what the images suggest, since printed conductors are low-impedance and easy to probe.
- Vectorizing. The bitmap gets converted to real geometry: pads, conductor polygons, via locations, keepouts, print registration allowances. Nothing is auto-traced and shipped. Every net gets checked against the probe data.
- Verification. The extracted netlist is compared against the physical board net by net. Mismatches get re-probed, not guessed. Then the fabrication data goes out with dimensional callouts, and if you want boards built, a first article goes back on the microscope before anything scales.
Ceramic substrate types and what each one costs you in effort
| Substrate / build | Typical use | What makes the copy hard |
|---|---|---|
| Thick-film on 96% alumina | Sensors, hybrids, automotive modules | Printed resistors need value + trim recovery; conductor edge bleed obscures true width |
| Thin-film on alumina or AlN | RF, microwave, precision analog | Sub-50 µm lines, tight impedance control, thin metallization damaged easily during handling |
| DBC / AMB (copper on Al₂O₃, AlN, Si₃N₄) | IGBT and SiC power modules | Copper thickness and etch-back profile must be measured, not eyeballed; ceramic type affects thermal rating |
| LTCC / HTCC multilayer | Aerospace, RF packages, hermetic assemblies | Truly buried layers, no non-destructive read; needs X-ray plus sacrificial sectioning |
| Metallized ceramic with edge/via castellations | Modules soldered onto a carrier board | Edge metallization geometry and wrap tolerance drive the assembly fit |
Power substrates are the closest cousin to conventional work, and the same discipline we apply to boards with very thick copper layers carries over: current path cross-sections, clearance to the ceramic edge, and thermal spreading all matter more than routing elegance.
What to send us, and what comes back
You’ll get a straight answer faster if the first message contains these:
- Clear photos of both sides on a dark, matte background, whole board in frame, no flash glare. Ceramic reflects hard — diffuse light from the side beats overhead flash every time.
- Board dimensions including ceramic thickness if you can measure it, and the number of visible conductor layers.
- The chip markings on any packaged ICs, typed out, plus a note if there is bare die under glob top or a lid.
- One line on deliverables: Gerber and drill only, or netlist and BOM too, or a full schematic, or built boards.
- How many samples you can supply. Two identical boards changes what’s possible. One irreplaceable board changes the method.
What comes back from us is a feasibility read (what we’re confident we can recover, what we’re not), a lead time, and a price. If the board looks marginal, we’ll say so before you ship it. We also handle the DBC and thin-film variants under the same intake process described in our breakdown of how layer count changes a copy job, because layer count drives ceramic work just as it drives FR-4.
Where ceramic PCB copy gets hard, and where it sometimes fails
Honest limits, because you’re going to run into them:
Buried layers in co-fired multilayer. In LTCC or HTCC there is no way to peel a fired stack apart cleanly. X-ray tells us where the metal is in plan view but not always which layer it sits on when two layers overlap. Resolving that reliably needs a sacrificial board for cross-sectioning. With a single sample and no permission to destroy it, some internal nets stay inferred rather than confirmed — and we’ll flag exactly which ones.
Printed resistors that have already drifted. A laser-trimmed thick-film resistor that has aged, been overheated, or sits in a failed circuit may not read its design value. We reconstruct from geometry and from the circuit’s needs, but the recovered value is an engineering judgment, not a measurement of the original intent.
Bare die. If the functional core of the board is an unmarked die, copying the substrate gives you the interconnect, not the part. Identification depends on pad map, die dimensions, and circuit context. Sometimes it resolves cleanly; sometimes the honest answer is “this is a custom ASIC and no substrate copy replaces it.”
Cracked or chipped samples. Ceramic that arrived broken, or that cracked in service, may have lost conductor material at the fracture. A second sample fixes this. Nothing else does.
Firmware. If the module contains a locked microcontroller and you need the code as well as the board, that is a separate workstream from the substrate copy — different equipment, different feasibility question, and it depends entirely on the specific part and its protection state.
Legitimate use, briefly
Most ceramic work that lands here is obsolescence and repair: a power module the OEM stopped building, a sensor hybrid whose original supplier closed, a legacy instrument that has to stay in service another decade, or failure analysis on a field return. You’re responsible for holding the rights to the design you send us and for complying with applicable IP law. Everything runs under NDA, and sample boards go back to you unless you tell us to scrap them.
What drives price and lead time
There’s no flat rate, and anyone quoting one before seeing photos is guessing. The real drivers:
- Conductor layer count. Two-sided thick-film alumina is straightforward. Six-layer LTCC is a different project entirely.
- Feature size. Thin-film at
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