Most people searching for Defense PCB Copy have the same problem: a board in a fielded system has failed, the original supplier is gone or the part is end-of-life, and nobody can find the design files. The work involved is board duplication plus schematic recovery from the physical assembly — copper layers traced out, net-by-net, components identified, and a manufacturable file set rebuilt so you can produce spares that behave like the original. Whether it’s feasible depends mostly on coating, potting, and what’s inside the programmable parts.
Why defense sustainment drives most of these projects
Defense hardware stays in service for decades. The airframe, the vehicle, the ground station, the test set on the bench — all of them outlive the semiconductor supply chain by a wide margin. A board designed around a 5V PLD and a mask-ROM microcontroller in 1994 is still flying, and the depot has three spares left.
The typical trigger is one of these:
- The original design house was acquired, dissolved, or simply lost the archive. Tape backups from a 1990s CAD system are frequently unreadable even when they exist.
- A key component went obsolete and the last-time-buy window closed. You need the netlist before you can evaluate a substitute.
- Depot repair is running out of failed-board donors to cannibalize, and a new production run of spares is cheaper than a full redesign and requalification.
- Failure analysis on a recurring fault requires a schematic nobody has.
- A subassembly must be re-hosted onto current parts, but the interface behavior has to stay bit-for-bit identical to the legacy board.
None of that is about copying somebody else’s product. It’s sustainment, and it’s the reason this niche exists. That said, the customer has to hold the rights to the design or the authorization to have it reproduced, and to comply with applicable IP and export control law in their jurisdiction — we work under NDA on that basis and don’t take projects where ownership is unclear.
What actually happens to a defense board on the bench
Defense assemblies differ from commercial ones in ways that change the process order, so the sequence matters.
1. Intake, imaging, and coating assessment
The board is photographed as received, both sides, before anything is touched. Then we look at the finish. Acrylic conformal coat, urethane, silicone, or parylene each behave differently under solvent and heat, and picking wrong ruins silkscreen legends and part markings you still need to read. Silicone and parylene are the slow ones. Fully potted modules are a separate conversation entirely.
2. Component identification before disassembly
Markings get logged while they’re still legible. Defense boards are full of military-grade parts with slash-sheet designators, house numbers, and screened date codes rather than commercial part numbers, so cross-referencing takes real time. Passives get measured in circuit and then verified after removal. Anything unmarked or laser-ablated gets characterized electrically, and where the marking is gone entirely we say so in the BOM rather than guessing.
3. Layer imaging and net extraction
Outer layers are scanned at high resolution. Inner layers on a multilayer board are exposed one at a time by controlled removal, imaged, and registered against the drill pattern so vias line up across the stack. X-ray helps locate buried and blind vias and confirms BGA ball counts before any copper comes off. The netlist is then built from the imaged layers and checked electrically against the original board wherever the original still functions.
4. Stackup and impedance reconstruction
Cross-sections give dielectric thicknesses, copper weights, and core versus prepreg arrangement. For boards with RF sections or controlled-impedance differential pairs — common in radar, datalink, and secure comms hardware — that measurement drives the manufacturing notes. Getting the stackup wrong turns a 50-ohm line into a 60-ohm line and the copy looks perfect while performing badly.
5. Schematic capture and verification
The netlist becomes a readable schematic organized by function — power, clocking, I/O, signal chain — not a rat’s nest that mirrors the layout. Then it gets checked backward: every net in the drawn schematic is verified against continuity on the physical board. Fabrication output is generated to normal acceptability expectations, with IPC-A-600 and IPC-6012 as the reference for what the finished bare board has to meet, and Class 3 called out when the application warrants it.
What you send us, and what you get back
Quoting a defense board from a vague description wastes everyone’s week. Send this and you’ll get a real answer:
- Clear photos of both sides, whole board in frame, on a dark non-reflective background, with the camera square to the board and good diffuse light.
- Overall board dimensions and, if you know it, the layer count.
- Close-ups of every microcontroller, DSP, FPGA, CPLD, or memory device, with the markings readable.
- A note on the coating or potting, and whether you have a spare board that can be destructively sectioned.
- One line on the deliverables you need — Gerbers only, or schematic and BOM, or a working assembled board.
- Quantity, if spares production is the end goal, and whether firmware is part of the scope.
Back comes a feasibility assessment, a deliverable list, a lead time, and a price. Below is how the tiers usually break down.
| Scope | You receive | Best when |
|---|---|---|
| Fab data only | Gerbers, drill files, stackup notes, fab drawing | You just need bare boards remade and you already have the BOM and assembly process |
| Full documentation | Schematic, netlist, BOM with alternates, pick-and-place, Gerbers | Long-term sustainment, obsolescence planning, or a future redesign |
| Documentation + firmware | Above plus extracted binary from the original MCU or memory | The code exists only in the fielded part and nobody has the hex |
| Turnkey spares | Assembled, tested boards against a first-article-approved sample | Depot needs functioning units, not files |
Where a defense PCB copy gets hard, and where it stalls
This is the part competitors skip. Honest constraints, in rough order of how often they bite:
Potting and epoxy encapsulation. Defense modules are often deliberately potted for shock, vibration, or anti-tamper reasons. Removal is chemical and mechanical, it’s slow, and it sometimes destroys the very traces you need. With only one sample and no second article, potted assemblies carry genuine risk of an incomplete result — we tell you that before we start, not after.
Programmable logic with no source. A CPLD or FPGA in a legacy fire-control or interface board holds behavior nowhere in the documentation. Some device families can be read back; many have programmed security bits that prevent it. Where readback isn’t available, the practical path is black-box characterization of the pins — stimulate, capture, infer the logic — and that produces a functional equivalent, not a bit-identical copy.
Secured microcontrollers. Feasibility depends entirely on the family and the protection actually set. STM32 parts sit at a specific RDP level, MSP430 devices may have a blown JTAG fuse or a BSL password, and 8051 and AVR derivatives use lock bits and security fuses. Each combination is a separate question with a separate answer. We assess the specific device you send. Nobody should promise you a guaranteed result on a locked part sight unseen, and we don’t.
Custom and screened components. Hybrid microcircuits, house-numbered ASICs, and custom magnetics with no datasheet may have no drop-in replacement. We can document the footprint and measure the electrical behavior, but if the part is genuinely unobtainable the honest recommendation may be a redesign of that section rather than a straight copy. That’s a common outcome on military electronics board duplication and it’s better to hear it during quoting.
Single-sample projects. One board and no spare means no destructive analysis budget. That limits inner-layer work and pushes the job toward non-destructive imaging, which is slower and less complete on dense stackups.
What drives price and lead time
No fixed numbers here, because the honest answer is that two boards of the same size can differ by a factor of several. The levers are:
- Layer count and density. A two-layer analog interface card is straightforward. A twelve-layer signal-processing board with fine-pitch BGAs means each inner layer is imaged and registered separately, and that time is not compressible.
- Component count and how many parts need individual characterization.
- Coating or potting removal effort.
- BGA and fine-pitch presence, which brings X-ray and rework into the process.
- Whether firmware extraction is in scope, which is priced and scheduled independently of the board work.
- Deliverable depth — Gerbers alone finish much sooner than a verified schematic with an alternates-qualified BOM.
As a rough shape: simple boards run in days, dense multilayer assemblies with locked programmable parts run meaningfully longer, and potted modules are quoted with a range rather than a date. The engineering discipline is similar to what we apply to precision test and measurement boards — high-reliability documentation, tight tolerances, and verification against the original rather than assumption.
FAQ
Can you copy a defense board that’s fully conformal coated?
Usually yes. Acrylic and urethane coatings come off with controlled solvent and thermal methods without damaging traces or part markings. Silicone and parylene take longer and require more care. Full epoxy potting is the harder case — removal is possible but risks trace damage, so a second sample board substantially improves the odds.
What if the microcontroller on the board is locked?
It depends on the exact device and the protection level set on it. Send the chip marking and we’ll tell you
Working on a board like this?
Send the chip marking or two photos. You get feasibility, lead time and price within 24 hours, and the check costs nothing.
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