HDI PCB Copy: Microvias, Stacked Vias & Build-Up Layers

Why HDI PCB Copy Is a Different Challenge

High-Density Interconnect boards pack more connections into less space by using microvias, blind and buried vias, and sequential lamination build-up layers. When you need to copy an HDI board—whether for end-of-life replacement, second-source qualification, or cost-down redesign—the usual “photograph, trace, and redraw” workflow falls short. Microvias as small as 75 µm sit under surface pads, stacked via columns span multiple lamination cycles, and dielectric thicknesses shift from core to prepreg to build-up film.

This article explains the complete HDI PCB copy process: how each structural feature is identified, measured, and reconstructed into fabrication-ready output files. If you are already familiar with how layer count affects reverse-engineering complexity and cost, consider this the deep-dive into the most demanding end of that spectrum.

Understanding HDI Structures Before You Start

Microvias

A microvia is any via with a finished hole diameter of 150 µm (6 mil) or less and a depth that does not exceed one dielectric layer. They are typically laser-drilled and can be filled with copper or resin. In an HDI PCB copy project, the critical parameters to recover are:

• Capture pad diameter on both target and landing layers
• Drill diameter (top opening vs. bottom landing)
• Fill type—copper-filled, resin-filled, or open
• Layer span—L1-L2, L2-L3, etc.

Stacked and Staggered Vias

Stacked vias place one microvia directly on top of another across successive build-up layers, forming a vertical column. Staggered vias offset each successive microvia slightly. The difference matters for reliability: stacked vias require copper filling of each lower via before the next lamination cycle. During HDI PCB copy, misidentifying a staggered via as stacked—or vice versa—creates a fabrication failure at the prototype stage.

Build-Up Layers and Sequential Lamination

HDI boards use sequential lamination. A central core is drilled and plated first, then additional dielectric layers (often ABF film or thin prepreg) are laminated on one or both sides. Each new layer adds a lamination cycle, and each cycle adds cost and registration tolerance. A “1+N+1” stackup has one build-up layer per side; “2+N+2” has two; and “3+N+3” boards—common in smartphone main boards—have three. Recovering the exact build-up sequence is non-negotiable for a faithful HDI PCB copy.

Step-by-Step HDI PCB Copy Process

1. Visual Inspection and X-Ray Imaging

The process starts with high-resolution optical photography of both sides. Surface features reveal pad locations, solder-mask openings, and component footprints. X-ray imaging then exposes internal via structures without destroying the board. Modern 2D and 3D X-ray systems can resolve features down to 1 µm, letting engineers distinguish stacked from staggered vias, count lamination layers, and identify buried via spans.

For boards where via spans are invisible from the surface, X-ray is the first—and sometimes only—non-destructive method that reveals the internal routing architecture.

2. Cross-Section Analysis

X-ray provides geometry, but cross-sectioning provides material truth. A micro-section cut at a representative location reveals:

• Actual dielectric thickness per layer (core, prepreg, build-up film)
• Copper weight on each layer
• Microvia taper angle and fill quality
• Plating thickness in via barrels and on surface pads
• Presence of adhesion-promotion treatments between build-up layers

Cross-section data feeds directly into the stackup reconstruction document. Without it, the fabricator cannot select the correct materials or press cycles.

3. Layer-by-Layer Delayering

Chemical or plasma delayering removes one layer at a time. After each removal step, the exposed copper pattern is photographed at high magnification—typically 2400 DPI or higher for HDI boards. Registration marks etched into the board during original fabrication help align images across layers.

This stage is where HDI PCB copy diverges most from standard board copying. On a conventional through-hole board, you delayer and photograph. On an HDI board, you must also track which vias connect to which layers, because the same XY coordinate may host a microvia on L1-L2, a different microvia on L2-L3, and a buried via on L3-L8. Each connection must be logged in a via span table.

4. Image Digitization and Netlist Extraction

Scanned images are imported into PCB design software (Altium, Cadence, or KiCad) and converted to copper geometry. Trace widths, clearances, and pad shapes are measured and recreated. The netlist is then extracted and compared against a continuity test of the physical board to catch any digitization errors.

Boards carrying BGA packages with dense escape routing require extra attention here, because fanout vias under a BGA are often the highest-density region on the board.

5. Stackup Reconstruction

Using cross-section data, material identification, and the via span table, the engineer builds the complete stackup document. This document specifies:

If the original board uses Rogers, PTFE, or hybrid laminate materials on specific layers, FTIR spectroscopy or burn testing identifies the resin system so the copy uses the correct Dk and Df values.

Via Aspect Ratio: The Fabrication Constraint You Cannot Ignore

Every via—mechanical or laser-drilled—must satisfy an aspect ratio limit imposed by the fabricator’s plating capability. The aspect ratio is the board thickness (or via depth) divided by the drilled hole diameter. Exceed the limit and the plating cannot coat the barrel uniformly, leading to open circuits or reliability failures.

For HDI PCB copy, aspect ratio matters in two places:

1. Mechanically drilled through-vias and buried vias in the core, where aspect ratios of 8:1 to 12:1 are common limits.
2. Laser-drilled microvias, where the depth-to-diameter ratio is usually kept below 1:1 for single-depth microvias and must be carefully managed for stacked structures.

Use the interactive tool below to check whether your recovered via dimensions fall within standard fabrication limits. Enter the board or dielectric thickness and the drill diameter to see the aspect ratio instantly.

If the calculated ratio exceeds your fabricator’s capability, you have two options: increase the drill diameter (which consumes routing space) or restructure the stackup to reduce via depth. Both changes must be validated against the netlist and impedance targets before committing to prototyping.

Impedance and Signal Integrity in HDI Copies

HDI boards are overwhelmingly used in high-speed digital and RF applications—smartphones, network switches, medical imaging modules. That means controlled impedance is almost always a requirement. During HDI PCB copy, trace geometry and dielectric thickness recovered from cross-sections are fed into a 2D field solver to calculate characteristic impedance.

When the original specification is unavailable, engineers use impedance recovery techniques based on physical measurements and TDR testing to establish target values. Build-up dielectric layers are thinner and have tighter tolerance than standard prepreg, so even a 5 µm error in dielectric measurement can shift impedance by several ohms.

Common Pitfalls in HDI PCB Copy

Misidentifying the Lamination Sequence

A 10-layer board could be 1+8+1, 2+6+2, or even an asymmetric 2+6+1 (rare, but it exists). If you guess the wrong sequence, the fabricator drills vias at the wrong stage, and the board is scrap. Cross-section analysis at multiple locations eliminates guesswork.

Ignoring Via Fill Requirements

Stacked microvias require copper filling and surface planarization of each lower via before the next build-up layer is applied. If your copy data specifies open or resin-filled vias where copper fill is needed, the stacked column will have voids. Always document fill type from the cross-section.

Registration Tolerance Across Build-Up Layers

Each sequential lamination cycle introduces registration error. Original HDI designs account for this by adjusting annular ring sizes on inner layers. During copy, the recovered pad sizes must be preserved exactly—do not “clean up” pads to a uniform size, or you will eat into the registration budget.

Confusing HDI With Standard Multilayer

Not every board with small vias is true HDI. Some 8- or 12-layer boards use only mechanical drilling with small but standard aspect ratios. Misclassifying a standard board as HDI inflates fabrication cost. Conversely, treating a genuine HDI board as a simple multilayer leads to fabrication failures. The via span table and cross-section tell you which category you are dealing with.

HDI PCB Copy vs. Related Board Types

HDI technology often coexists with other specialized board constructions. Understanding where HDI copy overlaps with—and differs from—adjacent disciplines helps you scope a project accurately.

From Recovered Data to First Prototype

Once the HDI PCB copy data package is complete—Gerber files, drill files with via span definitions, stackup document, impedance table, and BOM—it moves to prototype fabrication. Selecting a fabricator with proven HDI capability is critical. Not every shop can handle 2+N+2 or 3+N+3 build-ups, and laser-drill registration varies widely between vendors.

The prototype should be subjected to functional testing against a golden-sample reference before volume production. For HDI boards, additional reliability tests—thermal cycling, microsection of the prototype’s stacked vias, and impedance coupon measurement—are strongly recommended.

If the goal of the copy is not just replication but also cost reduction, the recovered data can serve as a baseline for layer reduction, panel utilization improvement, and BOM consolidation. Reducing a 3+N+3 to a 2+N+2 build-up, for example, can cut fabrication cost by 30–40 % if the routing density allows it.

Checklist: What to Prepare Before Requesting an HDI PCB Copy

• Sample boards: At least two—one for non-destructive analysis, one for destructive cross-sectioning.
• Known specifications: Any datasheets, impedance targets, or material callouts you already have.
• Functional reference: A working board for golden-sample comparison during testing.
• Target fabricator shortlist: Confirm HDI capability (laser drill, sequential lamination, copper-fill plating) before the copy begins.
• Budget for cross-sectioning: Multiple cross-sections at different board locations may be needed for complex stackups.

HDI PCB copy is not a commodity service. The accuracy of microvia mapping, stackup reconstruction, and impedance recovery determines whether the first prototype works or becomes expensive scrap. Invest in cross-section analysis and X-ray imaging upfront—it is always cheaper than a failed prototype run.

Have questions about HDI or other specialized board types? Browse our reverse engineering FAQ covering 30 common buyer questions, or explore completed projects in our case library to see how similar boards were handled.

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