What Makes Heavy Copper PCB Copy Different?
Heavy copper PCB copy is the process of reverse-engineering and reproducing a printed circuit board that carries copper weights of 3 oz/ft² (105 µm) or greater—sometimes up to 20 oz/ft² (700 µm). These boards handle high current, dissipate significant heat, and appear in power supplies, motor drives, welding controllers, and EV charging infrastructure. Copying them accurately requires etch-factor compensation, cross-section analysis, and thermal modeling that standard PCB cloning workflows skip entirely.
Why Standard PCB Cloning Fails on Heavy Copper
On a typical 1 oz board, the etch factor is modest—maybe 1:1 to 1.5:1—and trace widths after etching land close to the artwork dimensions. Heavy copper changes everything. At 6 oz, the etch factor can reach 3:1 or higher, meaning the copper undercuts sideways almost as much as it etches downward. A trace drawn at 20 mil in the Gerber may actually measure 14–16 mil at the top surface after etching, with a trapezoidal cross-section.
If you scan the board surface optically and trace what you see, you capture the top of that trapezoid—not the base. Replicate those dimensions in a new Gerber without compensation and the fabricator etches the new board with the same undercut, producing traces that are now undersized by another round of etch loss. Current capacity drops. Fuses blow. Boards fail.
The Trapezoidal Trace Problem
Our engineers cross-section at least two representative traces per copper weight to measure the actual trapezoid profile: top width, base width, and sidewall angle. We then back-calculate the pre-etch artwork dimensions the original designer intended. This step alone can take 2–4 hours on a dense power board, but skipping it guarantees dimensional errors of 3–6 mil on every heavy trace.
Key Technical Challenges in Heavy Copper Board Reproduction
| Challenge | What Goes Wrong | Our Approach |
|---|---|---|
| Etch-factor compensation | Traces come out 15–30% narrower than intended | Cross-section measurement + per-layer etch tables matched to target fab |
| Plating uniformity | Vias and pads plate unevenly at ≥4 oz; barrel cracking risk | Specify minimum plating thickness per IPC-6012 Class 2/3; via aspect ratio ≤8:1 |
| Thermal relief geometry | Spoke width/count wrong → poor soldering or excess heat buildup | Measure original relief pattern under magnification; replicate spoke width ±2 mil |
| Lamination press-out | Thick copper displaces prepreg, creating resin-starved areas | Stackup modeling with resin fill calculations; specify high-resin prepreg where needed |
| Solder mask adhesion | Mask tents poorly over tall traces; peels during thermal cycling | Specify LPI mask with double-print process; flag step heights >100 µm for fab review |
| Drill registration | Board warpage from asymmetric copper shifts hole locations | Balanced copper distribution per layer; drill compensation offsets in Gerber |
How We Execute a Heavy Copper PCB Copy Project
Step 1 — Incoming Inspection and Layer Count Verification
We photograph both sides under calibrated lighting, then use X-ray to confirm internal layer count and copper distribution. Heavy copper boards are often 2–6 layers, but we have seen 8-layer designs in industrial motor controllers where inner layers carry 4 oz copper for bus bars while signal layers use 1 oz. Assuming uniform copper weight across all layers is a common and costly mistake.
Step 2 — Delamination and Layer Imaging
Each layer is separated by controlled chemical or mechanical milling. For boards above 6 oz, mechanical milling is preferred because the thick copper resists chemical stripping unevenly, which can destroy fine features on adjacent layers. Each exposed layer is scanned at 2400 DPI minimum—higher than the 1200 DPI sufficient for standard boards—because the trapezoidal edges need sub-mil resolution to interpret correctly.
Step 3 — Etch-Factor Compensation and Gerber Generation
Using the cross-section data, our CAD team applies per-layer etch compensation. This is not a global offset. Inner layers etched with alkaline etchant behave differently from outer layers etched with ammoniacal chemistry. We maintain etch-factor tables for the fabricators we work with, so the compensated Gerbers are tuned to the specific production process that will build the clone.
Step 4 — BOM Extraction and Component Sourcing
Heavy copper boards typically carry high-power components: IGBTs, MOSFETs in D2PAK or TO-263 packages, large electrolytic capacitors, current-sense shunt resistors. Many of these parts are industrial-grade with long lead times. We identify every component, cross-reference datasheets, and flag any parts that are obsolete or export-restricted before quoting.
Step 5 — Stackup Specification and Fab Coordination
We don’t just hand off Gerbers. For heavy copper, we deliver a full stackup specification including copper weights per layer, prepreg type and resin content, core thickness, and finished board thickness tolerance (typically ±10% on boards above 3.0 mm). We also specify minimum annular ring (≥8 mil for heavy copper vias) and drill-to-copper clearance.
Copper Weight Ranges and What They Mean for Cloning
| Copper Weight | Thickness (µm) | Typical Application | Cloning Difficulty |
|---|---|---|---|
| 3 oz | 105 | LED drivers, DC-DC converters | Moderate — etch compensation needed but manageable |
| 4–6 oz | 140–210 | Motor drives, UPS systems, welding controls | High — cross-section required, solder mask issues common |
| 8–10 oz | 280–350 | High-current bus bars, EV charger power stages | Very high — limited fab options, long lead times |
| 12–20 oz | 420–700 | Specialty power distribution, rail traction | Extreme — often mixed with standard layers, requires hybrid stackup |
Boards in the 3 oz range overlap with what some engineers call thick copper PCB reproduction. The distinction is somewhat arbitrary, but in our workflow, anything at 3 oz or above triggers the heavy copper process with mandatory cross-sectioning.
Where Heavy Copper Boards Show Up
Power electronics is the obvious answer, but the range is wider than most people expect. We regularly handle heavy copper PCB copy for inverter control boards running 200 A+ bus currents, EV charger power stages with 6–10 oz inner layers, and industrial welding equipment where the original manufacturer has discontinued the board entirely.
Some designs combine heavy copper power layers with standard 1 oz signal layers and even HDI construction with microvias for the control logic section. These hybrid stackups are the most demanding projects we take on—each layer type needs its own compensation rules, and the overall stackup must balance mechanically to prevent warpage.
What Can Go Wrong — Honest Failure Modes
- Fab rejection: Not every PCB fabricator can process 6 oz+ copper. We pre-qualify fabricators for each project and maintain relationships with three heavy-copper-capable shops.
- Via barrel cracking: Thick copper increases Z-axis expansion stress on plated through-holes during thermal cycling. We specify via diameter and plating thickness per IPC-6012 Class 3 when the application demands it.
- Impedance mismatch on signal layers: If the board mixes heavy copper power layers with controlled-impedance signal layers, the thick copper cores change the dielectric spacing. We model impedance for every signal layer independently.
- Component thermal pad mismatch: Heavy copper conducts heat so efficiently that thermal relief pads must be replicated exactly. Omit one spoke or widen it by 5 mil and the component becomes impossible to hand-solder for rework.
Deliverables You Receive
- Compensated Gerber files (RS-274X) with per-layer etch notes
- Drill file (Excellon) with plating specifications
- Full stackup drawing with copper weights, prepreg specs, and tolerances
- Bill of Materials with manufacturer part numbers, package types, and alternates
- Schematic (optional, quoted separately) in Altium or KiCad format
- Assembly drawing with polarity, orientation, and placement coordinates
Related Board Types We Handle
Heavy copper boards often coexist in systems alongside other specialty PCBs. If your project includes an aluminum-substrate heatsink board for LED or power dissipation, or a dedicated power PCB with high-current BGA regulators, we can clone the full board set as a coordinated project—shared BOM, matched revision control, single point of contact.
What copper weight qualifies as “heavy copper”?
Industry convention starts at 3 oz/ft² (105 µm). Some fabricators use 4 oz as the threshold. In our workflow, any board at 3 oz or above triggers mandatory cross-section analysis and etch-factor compensation, which is the practical dividing line between standard and heavy copper PCB copy.
Can you copy a board that mixes heavy copper and standard layers?
Yes. Hybrid stackups—for example, 6 oz inner power planes with 1 oz outer signal layers—are common in motor drives and inverters. We apply different etch compensation and impedance models per layer. The stackup specification we deliver to the fabricator calls out each layer’s copper weight individually.
How long does a heavy copper PCB copy project take?
Typical turnaround for Gerber and BOM extraction is 7–12 working days for a 2–4 layer board at 3–6 oz copper. Boards above 6 oz or with more than 4 layers can take 15–20 working days due to the additional cross-sectioning and fab coordination required. Fabrication lead time adds another 3–5 weeks depending on the copper weight.
Do you guarantee the clone will match the original’s current capacity?
We guarantee dimensional accuracy of the compensated Gerbers within ±2 mil of the calculated pre-etch dimensions. Current capacity depends on trace geometry, copper weight, and ambient temperature per IPC-2152. We provide the trace width and copper weight data; final current rating should be validated by your design team against your operating conditions.
What if the original board is damaged or partially delaminated?
We can work with damaged boards as long as at least 80% of each copper layer is intact and readable. Missing sections are reconstructed from symmetry, schematic analysis, and component pad patterns. We flag every reconstructed area in the deliverables so you know exactly what was inferred versus directly measured.
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