Budget more time and money for high frequency PCB reverse engineering than for a digital board with the same layer count — usually meaningfully more. The extra work is not the copper tracing; it’s identifying the laminate, recovering the exact dielectric thicknesses, and proving the reproduced board still hits the original impedance and insertion loss. A two-layer Rogers microstrip board can take longer than a six-layer FR-4 controlled board, and that surprises most buyers.
Why an RF board costs more than a digital board of the same size
On a digital board, a trace is a wire. Get the netlist right and small geometry errors wash out. On an RF board, the copper is the circuit. A quarter-wave stub, an edge-coupled bandpass filter, a Wilkinson splitter, a grounded coplanar waveguide feed — those are distributed elements whose values come from physical dimensions and from the dielectric constant underneath them.
That changes what has to be captured. Trace width matters to the micron, not to the mil. Dielectric thickness between signal and reference plane matters, because it sets impedance and coupling. Copper foil roughness matters above a few GHz because it adds conductor loss. Surface finish matters, since a thick nickel layer under ENIG behaves very differently from immersion silver on a 20 GHz line.
So the deliverable set for a high frequency board isn’t just Gerbers and a BOM. It’s a stackup drawing with named laminate, prepreg, and bondply, copper weights per layer, target impedances per net class, and a note on which structures are dimensionally critical and must not be “cleaned up” by a fabricator’s DFM engineer.
The hidden cost: material identification
Most of the price difference lives here. Board markings sometimes tell you the laminate family, and sometimes the silkscreen is blank or the legend is under a shield can. When the material is unknown, we work backward from measurement — cross-section a coupon to get real dielectric thicknesses and copper thickness, then extract effective permittivity from a known structure on the board and compare against candidate laminates.
Hybrid stackups add another layer of work. Plenty of production RF boards run a thin high-performance core for the RF layers bonded to FR-4 or a high Tg laminate for the digital and power section. Each bond interface has to be identified separately, because getting the bondply thickness wrong shifts the impedance of every buried line above it.
What drives the price of high frequency PCB reverse engineering
- Layer count and stackup complexity. Inner layers have to be imaged one at a time, and mixed-dielectric builds need each interface characterized rather than assumed.
- Whether the laminate is known. A clearly marked RO4350B board is straightforward. An unmarked PTFE composite means extraction work and, sometimes, a judgment call about the closest available substitute.
- Number of controlled-impedance net classes. One 50-ohm class is cheap to document. Differential pairs, a 75-ohm video class, and two coupled-line filter sections are not.
- Blind and buried vias, microvias, back-drilled vias. These require X-ray and cross-sectioning to map, and they constrain how the board can be rebuilt.
- Component count and package types. Fine-pitch BGAs, QFNs with ground paddles, and unmarked RF parts in tiny SOT or DFN bodies all slow identification down.
- Unmarked or laser-etched RF parts. LNAs, PAs, mixers, and SAW filters often have house codes. Pinout and behavior have to be inferred from the surrounding circuit.
- Whether you want electrical verification. A VNA comparison of the rebuilt board against the original sample is real lab time. It’s also the only way to know the copy performs, not just that it looks right.
- Whether firmware is involved. A radio board with a locked control MCU is two projects, not one, and the code side is priced separately.
- Deliverable depth. Gerbers plus drill is the floor. Schematic recovery, netlist, BOM, stackup drawing, and a fabrication note package cost more and are worth more.
We don’t publish flat prices for this work, because the honest answer changes by a factor of several between a two-layer antenna feed board and a ten-layer phased-array tile. Send photos and we’ll quote the actual board.
How lead time breaks down by board class
| Board class | What eats the time | Relative lead time |
|---|---|---|
| 2-layer microstrip on a single RF core | Laminate ID, trace-width accuracy, edge plating and via stitching detail | Shortest, but not “instant” — material work still applies |
| 4-layer hybrid (RF core over FR-4) | Two dielectric systems, bondply thickness, transition vias between sections | Moderately longer than a plain 4-layer digital board |
| 6–8 layer mixed digital + RF | Inner-layer imaging, multiple impedance classes, BGA fanout, plane splits | Notably longer; most of the schedule is inner layers and verification |
| 10+ layer with microvias or sequential lamination |