What Is PCB Cloning and Manufacturing?
PCB cloning and manufacturing is a turnkey service that starts with a physical circuit board and ends with a batch of production-ready copies. The process extracts Gerber files, a bill of materials, and netlist data from the sample, verifies them against the original, then feeds those files directly into fabrication and assembly lines. It collapses what would normally be two or three separate vendor relationships into a single engagement with one point of accountability.
Why Combine Cloning With Manufacturing?

Splitting the work—sending a board to one shop for reverse engineering, then shopping the files to a contract manufacturer—introduces handoff errors, format mismatches, and weeks of dead time. When our engineers own both halves, the Gerber data never leaves the controlled environment. Impedance targets set during extraction carry straight into the stackup calculator at the fab. Component alternates flagged during BOM extraction and procurement preparation get resolved before the line starts, not after a failed first article.
Common Scenarios That Demand a Turnkey Path
- Legacy equipment support: The original manufacturer is gone, no design files exist, and you need 50–500 replacement boards within a quarter.
- Product re-launch: You own an older product line and want to resume production without re-designing from scratch.
- Supply-chain de-risking: Your single-source PCB supplier is unstable, and you need an independent file set plus a qualified second source.
- Prototype iteration: You have a working sample but lost the original CAD data after a team transition.
Step-by-Step: How PCB Cloning and Manufacturing Works
The workflow below applies to a typical 4–8 layer FR-4 board. Higher layer counts, flex-rigid constructions, or boards with encrypted firmware add steps but follow the same logic. For a granular breakdown of the cloning phase alone, see our complete 10-step PCB cloning guide.
Phase 1 — Intake and Feasibility (Days 1–2)
We photograph the board under calibrated lighting, measure overall dimensions with ±0.05 mm calipers, and count layers via edge-lit inspection or micro-section if the layer count is ambiguous. A feasibility report goes back to you within 24 hours, noting any concerns—corroded vias, delamination between inner layers, or components with sanded markings.
Phase 2 — Reverse Engineering (Days 3–8)
High-resolution optical scanning captures each copper layer at 1200 DPI minimum. Inner layers on multilayer boards are exposed by controlled chemical de-layering or precision CNC milling. Our CAD team rebuilds the layout in Altium or KiCad, then runs a full DRC against IPC-2221B spacing rules. The output is a verified Gerber RS-274X set, an ODB++ package, drill files (Excellon), and a component placement file.
Phase 3 — BOM and Sourcing (Days 5–10, overlapping)
Every component is identified by package, marking code, and electrical measurement where markings are unreadable. We cross-reference against distributor databases and flag end-of-life parts immediately, proposing pin-compatible alternates with datasheet links. The final BOM includes manufacturer part numbers, package codes, quantities, and at least two approved sources per line item.
Phase 4 — Fabrication (Days 9–15)
Gerber data goes to our in-house or partner fab with a locked stackup and impedance spec. Standard capability covers 1–16 layers, 3/3 mil trace/space, 0.2 mm minimum drill, and ±10% impedance tolerance on controlled lines. Boards are electrically tested (flying probe for runs under 200 pcs, fixture test above) before leaving the fab.
Phase 5 — Assembly and Test (Days 13–18)
SMT placement runs on high-speed pick-and-place with ±0.025 mm accuracy. Through-hole components are wave-soldered or hand-soldered depending on volume. First-article inspection compares the assembled board against the original sample: we check critical nets with a boundary-scan or functional test jig where applicable. Finished boards ship with an inspection report and remaining samples returned.
Deliverables at Each Stage
| Phase | Deliverable | Format |
|---|---|---|
| Feasibility | Layer count, risk notes, quote | PDF report |
| Reverse Engineering | Gerber set, drill files, netlist | RS-274X / Excellon / ODB++ |
| Schematic (optional) | Full schematic with net names | PDF + native Altium/KiCad |
| BOM | Component list with alternates | Excel / CSV |
| Fabrication | Bare PCBs, electrical test report | Physical + PDF |
| Assembly | Populated boards, first-article report | Physical + PDF |
If you also need a recovered schematic for future design changes, we offer schematic recovery as an add-on that runs in parallel with Gerber extraction.
What Affects Cost and Timeline?
No two boards cost the same to clone and manufacture. The table below gives realistic ranges for the most common variables.
| Variable | Low Complexity | High Complexity |
|---|---|---|
| Layer count | 1–2 layers | 10–16 layers |
| Cloning lead time | 3–5 working days | 8–14 working days |
| Trace/space | ≥ 6/6 mil | 3/3 mil HDI |
| BOM line items | < 80 | 400+ |
| Batch size sweet spot | 5–50 pcs | 200–5,000 pcs |
| Total turnaround (clone → ship) | 10–14 working days | 18–28 working days |
Boards with specialty substrates—thermal management metal-core designs or polyimide flex circuits—add material lead time and may require additional de-layering steps during cloning.
Where Things Go Wrong (and How We Prevent It)

Sanded or Counterfeit Component Markings
About 15% of legacy boards we receive have at least one IC with an intentionally sanded marking. We use decap imaging and electrical characterization to identify the die, but this adds 2–3 days per device. We flag these in the feasibility report so you can approve the extra step before work begins.
Impedance Drift From Assumed Stackups
If the original stackup is unknown and we estimate dielectric thickness from micro-section measurements, impedance can drift ±8–12% from the original. For RF or high-speed digital boards, we recommend a TDR comparison between the original and the first fabricated sample before full production.
Obsolete Components With No Drop-In Replacement
When a part has been discontinued and no pin-compatible alternate exists, a minor layout modification may be required. Our engineers handle the reroute in-house, keeping changes within the existing board outline and mounting holes. This is documented in a change log delivered with the final files.
PCB Cloning and Manufacturing vs. Separate Vendors
| Factor | Turnkey (Single Vendor) | Split (Two+ Vendors) |
|---|---|---|
| File handoff errors | Eliminated | Common (layer naming, drill format) |
| Total lead time | 10–18 days typical | 20–35 days typical |
| Accountability | One NDA, one contact | Finger-pointing between shops |
| Impedance continuity | Extraction stackup = fab stackup | Often re-interpreted at fab |
| BOM sourcing | Integrated, alternates pre-approved | Separate procurement cycle |
Who Uses This Service?
Our typical PCB cloning and manufacturing clients include industrial equipment OEMs sustaining 10–20 year product life cycles, medical device companies needing IPC Class 3 replacement boards, and defense maintenance depots replacing obsolete avionics modules. Repair shops handling end-of-life consumer electronics also use smaller batch runs of 5–25 units. For an overview of what to expect when sending a single sample board, see our guide to single-sample PCB copy projects.
Getting Started
Ship us one working sample (two if the board is damaged or heavily corroded). We return a feasibility assessment within 24 hours at no charge, including layer count, estimated BOM complexity, and a fixed-price quote covering cloning through assembled boards. All work is performed under NDA with full IP transfer on completion.
[pcb_cta type=”quote”]
How many sample boards do I need to send for PCB cloning and manufacturing?
One working board is sufficient for most projects. We recommend sending two if the board shows physical damage, heavy corrosion, or if destructive de-layering is required for inner-layer extraction on boards above 4 layers. The second board serves as a functional reference for final comparison testing.
Can you clone a board and manufacture it if some components are obsolete?
Yes. During BOM extraction, we identify end-of-life parts and propose pin-compatible or functionally equivalent alternates. If no drop-in exists, our layout team modifies the affected footprint and reroutes traces within the existing board outline. The change is documented and approved before fabrication begins.
What is the minimum and maximum batch size for the manufacturing phase?
We handle batches from 5 pieces up to 5,000 pieces per order. Below 5 units, per-board setup costs make a turnkey run less economical—prototype-only orders may be better served by file delivery alone. Above 5,000, we transition to panel-optimized production with fixture-based electrical testing for cost efficiency.
Do I receive the Gerber files, or only the finished boards?
You receive both. Every turnkey engagement includes the complete Gerber RS-274X set, Excellon drill files, BOM with approved alternates, and component placement data. These files are yours to use for future production runs with any manufacturer. Schematic recovery is available as an optional add-on.
How do you handle controlled-impedance boards during cloning?
We micro-section the original board to measure dielectric thickness and copper weight per layer, then calculate the target impedance using the measured stackup. The same stackup specification is locked into the fabrication order. On high-speed or RF boards, we perform TDR verification on the first article and compare it against the original before releasing the full batch.
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