PCB copy cost is driven by five things: layer count, component count and density, whether there are BGAs or other hidden-pad packages, whether firmware has to come out of an MCU, and which deliverable files you actually need. A two-layer motor driver with 40 through-hole parts and a ten-layer telecom board with three BGAs sit at opposite ends of the same price list. Below is how we build a quote, and what makes it move.
Why nobody can give you a price from a keyword
Every shop that publishes a flat number is either quoting the simplest possible board or planning to revise the figure after they see yours. The work is measured in engineer-hours of tracing, verification, and documentation, and those hours scale with the physical board in front of us — not with a service tier.
What we can tell you honestly is the shape of the curve. Two-layer boards are the cheapest work we do because both copper layers are visible under a microscope and you can verify nets with a meter on the bench. Four layers roughly doubles the effort, because the two inner layers have to be imaged after controlled delamination and then registered back to the outer layers using via positions as reference points. Beyond six layers, cost climbs faster than layer count, since every added layer multiplies the number of net segments that have to be stitched together and cross-checked.
The five cost drivers, ranked by how much they move the number
1. Layer count and stackup
This is the single biggest lever. Each internal layer has to be separated, scanned, vectorized, and aligned. Blind and buried vias make it worse, because a via that terminates on layer 3 doesn’t announce itself from the outside — you need X-ray or careful sectioning to figure out where it starts and stops. HDI boards with microvias and stacked via structures are the most expensive board class we handle, and they’re the ones where we’ll usually ask for two samples.
2. Component count and density
Every part gets identified, cross-referenced to a real orderable part number, and placed in the BOM. A board with 60 components is a short afternoon of identification work. A board with 900 components, half of them 0402 passives with no printed markings, means measuring capacitance and resistance on desoldered samples or inferring values from circuit function. That’s slow, and it’s where quotes for “similar looking” boards diverge the most.
3. BGAs, QFNs, and anything with pads you can’t see
Fine-pitch BGAs raise cost for two reasons. First, the pad-to-net mapping under the package can’t be probed directly, so we work from X-ray images plus the layer scans. Second, removing and reballing a BGA to inspect the board underneath is destructive work that needs a proper rework station and adds risk to your only sample. A 0.4 mm pitch BGA with 400 balls costs meaningfully more to resolve than a 1.0 mm pitch part with 100.
4. Whether firmware is involved
Copying copper is a different discipline from getting code out of a locked microcontroller. If the board has an STM32 with read-out protection set, or an MSP430 with the JTAG fuse blown, or an 8051-family part with lock bits programmed, that’s a separate line item with its own feasibility assessment. Some configurations are routine. Others — STM32 RDP Level 2, for instance — are genuinely hard and we will tell you so before you pay anything. If you only need the hardware duplicated and you already have the hex file, skip this cost entirely.
5. Which deliverables you ask for
People often over-order. If you just want more boards built, you don’t need a full schematic — you need Gerbers, a drill file, a BOM, and a pick-and-place file. The schematic is extra work: it means grouping nets into functional blocks, assigning reference designators, and drawing something an engineer can read. Ask for what you’ll actually use.
What each deliverable tier typically costs relative to the others
| Deliverable set | What you get | Relative cost | Best when |
|---|---|---|---|
| Gerber + drill only | Fabrication data, bare board | Baseline | You need bare boards fast and already have the BOM |
| Gerber + BOM + placement | Full manufacturing package | Moderately above baseline | You want assembled boards, no design changes |
| Above + netlist | Connectivity you can verify | Higher | Debug, incoming inspection, or you plan to edit later |
| Above + schematic | Readable circuit documentation | Highest | Redesign, part substitution, engineering handover |
The jump from Gerber-only to full schematic on a dense multilayer board is substantial — often several times the baseline. On a simple two-layer board the gap is much narrower, because there just isn’t that much circuit to draw. If you’re weighing this against starting fresh, the cost comparison between copying and redesigning is worth reading before you commit.
Things that make a board harder to quote — and sometimes not feasible
We’d rather flag these upfront than discover them mid-project:
- Potted or conformal-coated assemblies. Epoxy potting has to come off chemically or mechanically, and it sometimes takes traces with it. We’ll usually ask whether a second sample exists.
- Sanded or lasered-off part markings. Common on boards where the original maker didn’t want them copied. Identification then depends on pin count, package, circuit function, and measurement — slower and occasionally inconclusive on custom ASICs.
- Custom or house-marked ICs. If a chip is a mask-programmed part made only for the original OEM, there may be no drop-in equivalent at any price. That’s a limit of the physical world, not of effort.
- Damaged or burned boards. A blown section removes the evidence we need. Copper that’s been vaporized can sometimes be reconstructed from the layer stack and circuit logic, sometimes not.
- Impedance-controlled and RF sections. Copying the geometry is straightforward; matching electrical performance means also matching dielectric constant and thickness, which requires material analysis and pushes cost up.
- Single-sample projects. When there’s only one board and it must survive, we work non-destructively where possible, and that’s slower.
None of these are automatic refusals. They’re the reason a quote is a conversation and not a lookup table.
What to send us so the quote is accurate the first time
Ninety percent of vague quotes come from vague inputs. Send this and you’ll get a real number instead of a range:
- Clear photos of both sides of the board, laid flat on a dark background, whole board in frame, taken straight down with good diffuse light. No flash glare on the solder mask.
- Board dimensions in mm, plus board thickness if you can measure it with calipers.
- Layer count if you know it. If you don’t, say so — we can often estimate from via density and edge inspection.
- Close-up shots of the main chip markings, especially the MCU, any FPGA or CPLD, and anything in a package you can’t identify.
- One line on deliverables: “Gerbers and BOM only” or “full schematic plus netlist, we plan to change the connector.”
- Quantity and end use, if you’re heading toward production. It changes how we document things.
What comes back from us: a feasibility read (including any of the hard cases above), a lead time, and a price for the deliverable set you named. If we think you’re paying for files you don’t need, we’ll say that too. There’s a short list of practical ways to bring the price down that mostly comes down to supplying good samples and ordering the right deliverables.
How lead time relates to price
They’re linked but not proportional. A simple double-sided board with visible traces is usually a matter of days for files. A four-layer industrial control board with a few hundred parts is meaningfully longer, mostly because of BOM verification and net cross-checking rather than the tracing itself. Dense multilayer work with BGAs runs into weeks.
Rush work costs more because it means pulling an engineer off a queue, not because the process changes. If you need bare boards or a working assembly rather than just files, add fabrication and assembly time on top — prototype builds from recovered data are a separate stage with their own schedule.
Legitimate use, briefly
Most of this work is maintenance economics: a line-down machine whose controller board is out of production, an obsolete part that needs a migration path, firmware whose source disappeared with a former contractor, or failure analysis on a field return. You’re responsible for holding the rights to the design you send us and for complying with applicable IP law in your jurisdiction. Every project runs under NDA, and we don’t reuse or resell customer data.
FAQ
How much does it cost to copy a 4-layer PCB?
More than a two-layer board of the same size, typically by a wide margin, because the two inner layers require delamination, separate imaging, and registration back to the outer layers. The final figure depends heavily on component count and whether BGAs are present. Send photos of both sides and the board dimensions and we’ll quote the actual board rather than a category.
Is PCB copy cheaper than designing a new board?
Usually, when the existing circuit works and you just need it reproduced. Copying skips architecture, part selection, simulation, and debug iterations. New design wins when the original uses obsolete parts you’d have to replace anyway, or when you need real functional changes — at that point you’re paying for a redesign either way.
Does the price include the actual boards, or just the files?
Files and fabrication are quoted separately. The reverse engineering fee covers Gerbers, drill data, BOM, and whatever else you ordered. Bare board fabrication and assembly are separate line items that scale with quantity, panel utilization, and component sourcing. Ask for both if you want a landed cost
Working on a board like this?
Send the chip marking or two photos. You get feasibility, lead time and price within 24 hours, and the check costs nothing.
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