You send two boards to a reverse-engineering lab on the same Monday. One comes back as a complete Gerber file set by Thursday. The other takes until the middle of the following month. Both projects are legitimate, both labs are competent—so what explains the gap?
PCB copy turnaround time is not a single number. It is the sum of imaging, netlist extraction, component identification, firmware recovery, verification, and sometimes prototype fabrication. Each stage has its own clock, and each one can stall or fly depending on the board in front of the technician.
This article walks through every variable that determines your timeline, gives you realistic benchmarks for common board types, and includes an interactive lead-time estimator so you can model your own project before you even request a quote.
The Five Stages of a PCB Copy—and Where Time Hides
Before we talk about what makes a project fast or slow, you need to understand the workflow. A professional reverse-engineering and board duplication workflow typically follows these stages:
- Incoming inspection and photography — The lab photographs the board, catalogs components, and checks for physical damage. Time: 1–4 hours.
- Layer imaging and de-layering — Copper layers are captured optically or through micro-sectioning. Time: 2 hours for a 2-layer board; 2–5 days for a 16+ layer board.
- Schematic and netlist extraction — Engineers trace every connection and produce a netlist. Time: 4 hours to 5+ days depending on density.
- BOM generation and component verification — Every part number is confirmed against datasheets. Time: 2 hours to 2 days.
- File output, DRC, and optional prototype — Gerber files are exported, design-rule checks are run, and if requested, a prototype is fabricated and tested. Time: 4 hours to 10+ days.
Add those ranges together and you can already see why turnaround spans from under three days to well over three weeks. Now let’s look at the individual factors that push a project toward one end or the other.
Factor 1: Layer Count
Layer count is the single biggest predictor of PCB copy turnaround time. Each additional copper layer must be imaged, aligned, and traced. The relationship is not linear—it is closer to exponential because inner-layer vias create dependencies between planes.
| Layer Count | Typical Imaging Time | Typical Total Turnaround |
|---|---|---|
| 1–2 layers | 2–4 hours | 2–4 business days |
| 4 layers | 4–8 hours | 4–7 business days |
| 6–8 layers | 1–2 days | 7–12 business days |
| 10–16 layers | 2–4 days | 12–18 business days |
| 18–24 layers | 3–5 days | 15–25+ business days |
A simple two-layer board can often be turned around in a long weekend. A 24-layer telecom backplane, on the other hand, may require micro-sectioning of the physical board, which is destructive and cannot be rushed without risking data loss.
Factor 2: Board Condition
A clean, fully populated board in working condition is the ideal starting point. When the sample arrives burnt, corroded, or with missing components, the lab must spend extra time on recovery before the actual copy work even begins.
- Clean, working board: No added time.
- Minor corrosion or dust: Add 2–4 hours for cleaning and re-inspection.
- Burnt traces or delaminated layers: Add 1–3 days. Some traces may need to be inferred from surrounding circuitry.
- Missing components: Add 1–2 days for identification via pad geometry, silkscreen markings, and circuit analysis.
If your board has physical damage, it is worth reading about what is still recoverable from a damaged PCB before setting timeline expectations.
Factor 3: Component Complexity
A through-hole board with standard DIP packages can be cataloged in an hour. A board packed with BGA packages, QFN components, and custom ASICs is a different story entirely.
BGA Devices
Ball Grid Array packages hide their connections underneath the chip. The lab must either X-ray the device in place or remove it to photograph the pad pattern. Either method adds time—typically half a day to a full day per BGA. For boards with multiple BGAs, this stage alone can consume several days.
Programmed Microcontrollers
If the board contains a microcontroller with read-out protection, firmware extraction becomes a separate workstream. Some chips yield their contents in hours; others require weeks of research or may be permanently locked. This is the single most unpredictable variable in the entire timeline.
Obsolete or Unmarked Parts
Components with sanded markings or discontinued part numbers require detective work: measuring pin-to-pin resistance, checking package dimensions against historical databases, and sometimes purchasing NOS (new-old-stock) parts to confirm a match. Each unknown component can add hours to the BOM phase.
Factor 4: Firmware and Embedded Code
Not every PCB copy project involves firmware, but when it does, the timeline can shift dramatically. Here is a rough breakdown:
| Firmware Scenario | Added Time |
|---|---|
| No programmable ICs on board | 0 days |
| Unprotected EEPROM / SPI flash | 0.5–1 day |
| MCU with standard read-out protection | 2–5 days |
| MCU with high-security fuses (e.g., STM32 RDP Level 2) | May be unrecoverable |
| FPGA / CPLD with encrypted bitstream | 3–10 days (if feasible) |
If your board uses an STM32 or similar MCU, make sure you understand the protection level before committing to a timeline. A board that is otherwise a three-day job can become a three-week project—or an impossible one—based solely on one chip’s security fuse.
Factor 5: Documentation Requirements
Some buyers only need Gerber files. Others need a full schematic, annotated BOM with approved alternates, assembly drawings, and a test procedure. The documentation level you request directly affects turnaround.
- Gerber-only output: Baseline turnaround.
- Gerber + schematic: Add 1–3 days.
- Full documentation package (Gerber, schematic, BOM, assembly drawing, test plan): Add 3–7 days.
- Regulatory documentation (IPC-class compliance notes, medical-device traceability): Add 3–5 days on top of full documentation.
Projects in regulated industries—medical devices, aerospace, automotive—almost always fall into the longer timelines. An MRI console board recovery, for example, required not just accurate files but full traceability documentation that nearly doubled the engineering hours.
Factor 6: Prototype Fabrication and Testing
Many buyers want the lab to fabricate and test a prototype board before handing over files. This adds the entire PCB manufacturing cycle to the turnaround:
- 2-layer prototype (domestic quick-turn): 2–3 days fabrication + 1 day assembly + 1 day test = ~5 days added.
- 4–6 layer prototype: 5–7 days fabrication + 1–2 days assembly + 1–2 days test = ~10 days added.
- High-layer-count or HDI prototype: 10–15 days fabrication + 2–3 days assembly + 2–3 days test = ~17 days added.
If you can accept files without a physical prototype, you can shave a week or more off the total timeline. If you need a verified clone, budget accordingly.
Estimate Your Own PCB Copy Turnaround Time
Use the interactive estimator below. Enter your board’s layer count, condition, component types, firmware situation, and documentation needs. The tool calculates a realistic range based on the benchmarks discussed above.
PCB manufacturing
PCB Lead Time Estimator
Fabrication time is set by how many lamination and plating cycles your board needs, not by how urgently you need it.
How this is calculated
Each pair of layers beyond two adds a lamination cycle, and a lamination cycle is measured in hours of press time plus queue. HDI adds a full build-up sequence per order: a 2-order HDI board is laminated, drilled and plated three times over.
The engineering line is the one people forget. If your Gerbers arrive with a DFM problem, the shop stops and emails you, and the clock does not restart until you answer. Sending a complete package, with a drill drawing, a stackup drawing and a clear impedance table, is usually worth more calendar days than paying for an expedite.
The estimate is a planning tool, not a contractual commitment. Your actual turnaround will depend on the lab’s current queue, any surprises hidden inside the board, and whether you have chosen to include prototype fabrication. Still, it gives you a far better starting point than a blind guess.
Real-World Timeline Examples
To make these factors concrete, here are four anonymized projects from our reverse-engineering case studies:
Example A: Industrial Sensor Board
- Layers: 2
- Condition: Clean, working
- Components: All through-hole, no MCU
- Documentation: Gerber only
- Turnaround: 3 business days
Example B: Motor Controller
- Layers: 4
- Condition: Clean, working
- Components: SMD, one STM32 (RDP Level 1)
- Documentation: Gerber + schematic + BOM
- Turnaround: 9 business days
Example C: Face-Recognition Terminal
- Layers: 6
- Condition: Working, one obsolete IC
- Components: BGA processor, DDR memory, eMMC
- Documentation: Full package with component substitution
- Turnaround: 14 business days
This project required identifying a drop-in replacement for a discontinued camera interface IC. Read the face-recognition terminal case study for the full story.
Example D: Telecom Backplane
- Layers: 20
- Condition: Minor edge corrosion
- Components: Multiple BGAs, controlled-impedance traces
- Documentation: Full package + prototype
- Turnaround: 24 business days
How to Shorten Your PCB Copy Turnaround Time
You cannot change the physics of micro-sectioning, but you can control several variables that directly affect the timeline:
- Send a clean, working sample. If you have multiple units, send the one in the best physical condition. Review the sample preparation checklist before shipping.
- Provide any existing documentation. Even a partial schematic, a BOM fragment, or a photo of the board before damage occurred saves the lab from guessing.
- Clarify your deliverables upfront. If you only need Gerbers, say so. If you need a full documentation package, say that too. Scope changes mid-project are the number-one cause of timeline overruns.
- Decide on firmware early. If the MCU is protected, the lab should start firmware analysis in parallel with board imaging—not after.
- Skip the prototype if you can. If you have your own fabrication vendor and testing capability, accepting file-only delivery can cut a week or more.
- Choose the right service level. Some labs offer express tiers with dedicated engineering resources. The cost of a PCB copy rises with rush service, but the time savings may justify the premium.
When Turnaround Time Should Not Be Your Priority
Speed matters, but not at the expense of accuracy. A Gerber file set delivered in three days with a single misrouted trace will cost you far more in scrap boards and debugging than a file set delivered in seven days that passes DRC on the first try.
This is especially true for high-layer-count boards, controlled-impedance designs, and anything destined for a regulated industry. If your project involves obsolete equipment that no one else supports, the careful approach is almost always the faster path to a working board. Rushing the copy only to discover errors during prototype testing resets the clock entirely.
A good rule of thumb: if the board took the original designer weeks to lay out, expect the reverse-engineering effort to take at least as long as the imaging and tracing work alone—before documentation and prototyping.
Copy vs. Redesign: A Timeline Comparison
Some buyers assume that a full redesign would take longer than a copy. That is usually true, but not always. A four-layer board with one obsolete IC might be faster to redesign than to copy and substitute, because the redesign lets the engineer choose modern, in-stock components from the start.
| Approach | Best For | Typical Timeline Range |
|---|---|---|
| Exact copy | Boards with all components still available | 3–15 business days |
| Copy with substitution | Boards with 1–3 obsolete parts | 7–20 business days |
| Full redesign | Boards needing major component or feature changes | 15–40+ business days |
Frequently Asked Questions
Can I get a PCB copy in 24 hours?
For a single-layer or simple two-layer board with no firmware and Gerber-only output, some labs offer 24-hour rush service. Expect to pay a significant premium. For anything above four layers, 24 hours is not realistic.
Does sending two sample boards speed things up?
Yes. A second sample lets the lab de-layer one board (a destructive process for inner layers) while keeping the other intact for reference and testing. This can save 1–2 days on multilayer projects.
What if the lab finds a problem mid-project?
Common mid-project discoveries include hidden inner-layer shorts, undocumented test points, and MCU protection levels higher than expected. Each one can add 1–5 days. A good lab communicates these findings immediately and offers revised timelines rather than silently slipping the schedule.
Does board size affect turnaround?
Somewhat. A larger board takes longer to image and has more traces to follow, but the effect is smaller than layer count or component complexity. A large two-layer board is still faster than a small eight-layer board.
Planning Your Project
PCB copy turnaround time is predictable once you understand the variables. Use the estimator above to get a baseline, then refine it with your lab during the quoting process. The more information you provide upfront—board condition, layer count, firmware status, and documentation needs—the more accurate the estimate will be.
If you are still in the research phase, our reverse-engineering FAQ covers thirty common questions that buyers ask before committing to a project. And if you are ready to move forward, the fastest path to an accurate timeline is sending clear photos of both sides of your board along with whatever documentation you already have.
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