PCB Test Points vs Vias: What Makes a Reliable Probe Location?
A visible copper feature is not automatically a usable test point. When recovering or modifying a board, preserve the relationship between the electrical net, physical contact and the test that needs it.
Is a via the same as a test point?
A via provides an electrical connection between copper layers. A test point provides an intended place to contact a circuit for a defined test. A suitable via can also serve as a test point, but many vias are inaccessible or unsuitable for reliable probing.
The distinction is especially useful for legacy boards whose original test documentation is missing. A photograph may show a round feature without establishing its net, surface condition or accessibility after assembly. A label such as TP1 is helpful but still needs a documented function and reference.
This guide focuses on contact locations and access evidence. For the complete test sequence and acceptance criteria, use the existing PCB functional testing guide. For recovering undocumented connections, see PCB reverse engineering.
Compare common contact features
| Feature | Primary role | What to verify before use |
|---|---|---|
| Dedicated exposed test pad | Provide planned contact access | Net identity, accessible side, usable contact area and surrounding clearance. |
| Via | Connect copper across layers | Mask coverage, exposed surface, probe compatibility and physical access. |
| Component pad | Connect a fitted device to the board | Whether assembly blocks access or probing risks the joint. |
| Test loop or pin | Provide an attached contact feature | Mechanical clearance, suitability for the measurement and connection method. |
| Connector contact | Interface with external equipment | Pin assignment, mating method and whether required nets are available. |
A CAD application can mark a pad or via as a test point. Altium’s testpoint documentation distinguishes fabrication and assembly testpoint assignments. The designation helps generate data, but practical access must still be reviewed on the actual build.
Why an exposed feature may still be a poor contact
Solder mask or coating can prevent the probe from contacting metal reliably. A via beneath a fitted component may be visible in the bare-board data but inaccessible on the assembly. Nearby tall parts, an enclosure or a fixture support can also block the approach.
The contact geometry must suit the intended probe. A small annular ring around a hole is different from a flat exposed pad. Probe type, alignment tolerance, fixture mechanics and repeated use all affect contact reliability. There is no single pad diameter that can be promised to work with every fixture.
FixturFab’s design-for-test guide explains how pad and via geometry, spacing and access affect fixture choices. Have the fixture provider review the actual geometry and assembled clearances instead of copying a generic dimension into a recovered design.
Avoid turning an improvised contact into a released production method without review. Repeated pressure on an unsuitable feature can create unreliable measurements or damage. Record contact problems separately from circuit failures so that a fixture fault does not become a false board diagnosis.
Define what each test location must support
Begin with the question the measurement needs to answer. Power, communications, programming and analog measurements can require different connection arrangements. A physically reachable node may not be an appropriate measurement point for every signal or operating condition.
Record the net or pin function, expected operating condition and required measurement or stimulus. Include the reference connection and any relevant loading limitations in the test specification. Keep specialized measurements with qualified personnel and an appropriate setup.
Separate bare-board connectivity testing from testing a populated assembly. Fitted components can change what a simple electrical measurement means, while the assembly can obscure pads available during fabrication. A successful bare-board test does not demonstrate all operating functions of the completed controller.
A test point does not itself provide a pass/fail limit. That limit must come from the product requirement, a justified comparison or another approved source. Document the basis so that future operators can distinguish a validated specification from an informal observation.
Recover a useful test access map
Identify the revision. Label the sample and keep photographs of its as-received condition. A test map for another revision may point to a feature that has moved or changed function.
Establish the connection. Associate each proposed point with documented connectivity. Do not assign ground or power solely because a feature looks familiar. Keep uncertain nodes out of an approved test instruction until their role is established.
Describe the physical location. Record reference, side, coordinate convention and surrounding landmarks. State whether the coordinates refer to the top-side view or a mirrored bottom-side view. Include a clear orientation drawing to reduce ambiguity.
Review access after assembly. Check fitted components, coatings, enclosure restrictions and fixture approach. Keep the tested assembly variant in the record; a point accessible on one variant can be blocked on another.
Link the test and evidence. Assign the measurement, conditions and acceptance criteria to the point. Record any unreliable contacts and required fixture maintenance. Release the map with the same revision discipline as the board and test procedure.
What changes when the PCB is copied or redesigned?
A copied layout should preserve relevant test access where the reproduction scope requires it. If a recovered package omits test pads or changes the mask over a via, an existing fixture may no longer make reliable contact even when the main circuit appears unchanged.
A redesign may intentionally add or move contact locations. Treat that as a coordinated change to the board, assembly instructions, fixture and test records. Obtain fixture feedback before releasing the layout, particularly where access depends on dense components or a constrained enclosure.
For an illustrative handover, a row might identify TP7, the relevant net, bottom-side position, contact type and the test step that uses it. The actual voltage or tolerance should come from the approved test specification, not a generic example on a website.
Use revision compatibility review when a fixture must support several board versions. If a reproduced board fails only in the test setup, the clone troubleshooting guide helps separate contact, assembly, firmware and operating-condition questions.
Your project readiness checklist
Use this temporary checklist while preparing your enquiry. Ticking a box does not save or send information.
Keep unknown items marked as unknown. Send a concise description through the project enquiry form, or contact Judy@4PCBA.com to arrange confidential file sharing.
Frequently asked questions
Can a via be used as a PCB test point?
Yes, if its exposed contact, geometry, access and electrical role suit the intended test and probe. A via is not automatically suitable simply because it appears in the layout.
Are test points required only for bare-board testing?
No. Test access can support fabrication checks, assembly testing, programming, diagnosis and functional measurements. The required locations and access can differ between those stages.
Does a test point need a TP label?
A clear reference is useful, but the label alone does not establish the net or test conditions. A controlled map should connect the physical location to the intended measurement and board revision.
Should an existing fixture be checked after a PCB revision?
Yes. Changes in pad position, mask, components, connectors or assembly options can affect access and results. Review the affected fixture and test records for the revised build.
Make the next project decision with confidence.
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Bring your project details. We will help define the scope.
Send the board or chip reference, sample condition and the result you need. Include the tests or files already available. Judy will coordinate the initial feasibility review.
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