PCB to Schematic | Recover a Circuit Diagram From a Board

What Does PCB to Schematic Actually Mean?

PCB to schematic is the process of extracting a complete, human-readable circuit diagram from a physical printed circuit board when no original design files exist. An engineer traces every copper track, identifies each component, maps the full netlist, and redraws the circuit in a schematic editor — producing a file you can modify, simulate, and hand to a contract manufacturer. The result is not a photograph or a layout image; it is a functional electrical diagram with proper symbols, reference designators, net names, and hierarchical sheets where needed.

This is one of the most requested reverse-engineering deliverables we handle. Boards arrive from discontinued products, legacy industrial controllers, medical devices with lost documentation, and prototype runs where the original designer has moved on. In every case the goal is the same: turn copper and silicon back into an engineering document.

Why Would You Need to Recover a Schematic From a PCB?

The reasons fall into a handful of recurring categories. Understanding yours helps determine how deep the recovery needs to go.

• Legacy maintenance. A machine still runs, but the OEM no longer supports the control board. A schematic lets your in-house team diagnose faults and source replacement parts.
• Product redesign. You own the IP but the original Altium or OrCAD project is lost. A recovered schematic is the starting point for a new layout with updated components.
• Second-source qualification. You need to verify that a contract manufacturer’s board matches the approved design. A schematic extracted from the production sample is the reference.
• Failure analysis. Tracing a field failure to a specific net or component is far faster with a schematic than with a bare board under a microscope.
• Regulatory documentation. Some safety certifications (IEC 60601, UL 60950) require a schematic on file. If the original is gone, recovery is the only path.

How Is a PCB Converted to a Schematic? The 7-Step Process

There is no magic “scan and convert” button. Every serious PCB-to-schematic project follows a methodical workflow. Here is how our engineers approach it, step by step.

Step 1 — High-Resolution Board Imaging

Both sides of the bare board are scanned at 1200–2400 DPI. For multilayer boards (4+ layers), we use controlled-depth milling or chemical de-layering to expose inner copper. Each layer is photographed and aligned to a common origin with fiducial markers. A 6-layer board typically produces 8–10 distinct images (top silk, top copper, inner 1–4, bottom copper, bottom silk, solder mask layers).

Step 2 — Component Identification and BOM Extraction

Every component is cataloged: package type, marking code, orientation, and value. SMD resistors and capacitors are measured with an LCR meter when markings are ambiguous. ICs are cross-referenced against manufacturer datasheets to confirm pinouts. The output is a preliminary bill of materials with 80–95 % of values confirmed before schematic drawing begins.

Step 3 — Netlist Tracing

This is the most labor-intensive step. Using the layer images as a reference, engineers trace every copper connection — pad to pad, via to via — to build a complete netlist. On a 2-layer board with 150 components, expect roughly 400–700 unique nets. On a 10-layer HDI board, net counts can exceed 3,000. Continuity testing with a multimeter or flying-probe fixture validates ambiguous connections, especially where vias disappear into inner layers.

Step 4 — Functional Block Grouping

Raw netlists are electrically correct but visually meaningless. The engineer groups nets and components into functional blocks: power supply, microcontroller core, communication interfaces, analog front-end, connectors. This step requires actual circuit design knowledge — understanding what a TPS54331 buck converter circuit looks like, or recognizing an RS-485 transceiver’s typical surrounding passives.

Step 5 — Schematic Drawing

The grouped netlist is drawn in a schematic editor (Altium Designer, KiCad, OrCAD, or the client’s preferred tool). Each functional block occupies its own sheet or section. Power rails are drawn with proper power symbols; decoupling caps are placed near their associated ICs; signal flow reads left-to-right. The result must be readable by any competent engineer, not just the person who drew it.

Step 6 — Cross-Check and ERC

An electrical rules check (ERC) catches floating pins, shorted power nets, and missing connections. A second engineer reviews the schematic against the physical board, spot-checking at least 20 % of nets by probing. Discrepancies are resolved before delivery.

Step 7 — Deliverable Packaging

The client receives native schematic files (e.g., .SchDoc, .kicad_sch), a PDF export, a finalized BOM in spreadsheet format, and — if requested — a netlist file (.net or IPC-D-356). For clients who also need Gerber and fabrication data extracted from the same board, the schematic is back-annotated to the layout to ensure consistency.

What Tools and Software Are Used?

The choice of schematic editor depends on what the client will do with the file afterward. Here is a practical comparison of the tools we most often deliver into.

If you are evaluating dedicated PCB-to-schematic software options, be aware that no tool fully automates the conversion. Software can assist with image-to-copper vectorization or auto-detect component outlines, but the intellectual work — identifying component values, resolving ambiguous nets on inner layers, and organizing the schematic logically — still requires a skilled engineer.

How Long Does PCB to Schematic Recovery Take?

Turnaround depends almost entirely on board complexity. Here are realistic ranges based on projects we have completed.

These ranges assume the board arrives intact and components are not potted or ground down. Damaged or conformal-coated boards add 1–3 days for cleaning and component re-identification.

What Can Go Wrong — and Honest Limitations

No recovery process is perfect. Here are the failure modes we encounter and how we mitigate them.

• Burned or corroded traces. If copper is physically destroyed, the net cannot be traced from the board alone. We cross-reference the IC datasheet’s typical application circuit to infer the most likely connection, and flag it in the deliverable as “inferred — verify before production.”
• Unmarked or custom components. Proprietary ASICs, house-marked ICs, and laser-trimmed resistor networks may have no public datasheet. We can identify the package and pinout electrically, but the internal function remains a black box. The schematic will show the correct connections; the component will be labeled with its physical markings and a note.
• Blind/buried vias on HDI boards. These cannot be traced optically from the surface. Controlled-depth milling or X-ray imaging is required, adding cost and time. On boards with via-in-pad and stacked microvias, expect a 15–25 % increase in tracing effort compared to through-hole-via designs of the same layer count.
• BGA and QFN pads hidden under packages. If the component must remain soldered (e.g., the client needs the board returned functional), X-ray inspection replaces de-soldering. Our Dage X-ray system resolves features down to 5 µm, sufficient for 0.4 mm pitch BGA balls.

If a board has suffered delamination between copper layers, inner-layer imaging quality degrades. We will flag this during the initial assessment and provide a realistic accuracy estimate before committing to the full project.

Can You Do It Yourself?

For simple 1–2 layer boards with through-hole components, a competent engineer with a multimeter, a magnifying lamp, and a copy of KiCad can produce a usable schematic in a weekend. Our step-by-step PCB-to-schematic conversion guide walks through the process in detail.

For anything above 4 layers or 200 components, the economics shift. The tracing time alone exceeds 40 hours, and errors compound quickly without systematic cross-checking. Most engineering teams find it more cost-effective to send the board to a specialist and spend their own hours on the redesign that follows.

If you only have Gerber files rather than a physical board, the process is different — and more constrained. See our analysis of rebuilding a schematic from Gerber data for what is and is not possible in that scenario.

PCB to Schematic vs. Related Services

Clients sometimes confuse schematic recovery with adjacent deliverables. Here is how they differ.

Many projects combine deliverables. A typical full schematic recovery engagement includes the schematic, Gerber set, BOM, and a cross-reference document linking every net on the schematic to its physical trace on each layer.

What Should You Send Us to Get Started?

To provide an accurate quote, we need:

1. Clear photos of both sides of the board (smartphone photos are fine for quoting; we will do the high-res scanning).
2. Board dimensions — approximate is acceptable.
3. Layer count — if known. If not, we determine it from the board edge or via structure.
4. Preferred schematic format — Altium, KiCad, OrCAD, Eagle, EasyEDA, or PDF-only.
5. Context — what the board does and why you need the schematic. This helps our engineers organize the diagram into meaningful functional blocks rather than a flat rats-nest.

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