Power Supply PCB Reverse Engineering — What It Delivers
Power supply PCB reverse engineering is the process of extracting complete design documentation—schematic, Gerber fabrication files, and bill of materials—from an existing AC/DC, DC/DC, or multi-output power supply board. It is the most reliable path to resuming production, sourcing second-source replacements, or redesigning a supply whose original OEM files are lost, obsolete, or never available.
Our engineers handle everything from compact 5 W USB charger boards to 3 kW server PSU modules with PFC stages, LLC resonant converters, and synchronous rectification. Typical projects deliver verified Gerber data, a net-checked schematic, and a cross-referenced BOM within 5–12 working days, starting at roughly $600 for a single-output board under 50 components.
Why Power Supply Boards Deserve a Specialized Approach
Not every reverse-engineering workflow translates cleanly to power electronics. Power supply PCBs carry unique constraints that generic services often underestimate:
- High-voltage creepage and clearance. A 264 V AC input section requires minimum 6.4 mm creepage between primary and secondary per IEC 62368-1. Miss this in the Gerber output and the clone board fails safety testing.
- Magnetic component characterization. Transformers and inductors are custom-wound. We measure turns ratio, inductance, leakage inductance, and core material to specify a replacement or generate a winding spec. For a deeper look at this step, see our magnetics and safety considerations guide.
- Thermal management. Copper pours, thermal vias under QFN MOSFETs, and heatsink keep-out zones must be captured accurately. A 2 oz copper inner layer misidentified as 1 oz changes current capacity by roughly 40%.
- Safety-agency markings. UL, TÜV, and CCC recognized components (optocouplers, Y-capacitors, fuses) must be identified by exact part number, not just value, to maintain certification traceability.
- Potting and conformal coating. Many industrial supplies are potted in silicone or epoxy. Removal without damaging traces adds 1–3 days and requires solvent soaking plus mechanical decapsulation under magnification.
What Types of Power Supply PCBs Can Be Reverse Engineered?
| Topology | Typical Layer Count | Key Recovery Challenge | Est. Lead Time |
|---|---|---|---|
| Flyback (5–150 W) | 1–2 layers | Transformer winding spec, snubber values | 5–7 days |
| Forward / Half-Bridge (100–500 W) | 2–4 layers | Gate-drive timing, current-sense resistor tolerance (±1%) | 7–10 days |
| LLC Resonant (200 W–3 kW) | 4–6 layers | Resonant tank values (Lr, Cr, Lm), PCB parasitics | 8–12 days |
| PFC + LLC Combo | 4–6 layers | Dual-stage control loop, interleaved PFC inductor | 10–14 days |
| Multi-Output / Server PSU | 4–8 layers | OR-ing FET control, PMBus/I²C digital interface | 10–15 days |
| DC/DC Brick / PoL Module | 4–10 layers (often HDI) | Embedded magnetics, micro-via stackup | 7–12 days |
If your board sits outside these categories—say a GaN-based totem-pole PFC or a wireless power transmitter—send it for a feasibility review with our engineering team before committing.
Our Step-by-Step Process for Power Supply PCB Recovery
1. Incoming Inspection & Photography
We photograph both sides at 20+ megapixels, log board dimensions (±0.1 mm), and note silkscreen, safety markings, and any visible damage. Potted boards are chemically or thermally de-potted at this stage.
2. Component Identification & BOM Build
Every component is cataloged: manufacturer part number, package, value, and tolerance. Power semiconductors (MOSFETs, diodes, ICs) are cross-referenced against distributor databases. Safety-critical parts (Y-caps, optocouplers, fuses) are flagged for exact-match sourcing. Magnetic components receive bench measurements—we use an LCR meter at 1 kHz and 100 kHz, plus a turns-ratio tester.
3. Layer-by-Layer Imaging
After component removal, each copper layer is scanned optically or via micro-section for multi-layer boards. We resolve trace widths down to 4 mil (0.1 mm) and identify copper weight by cross-section measurement. High-voltage isolation slots, milled slots, and safety-critical routing gaps are dimensioned explicitly.
4. Schematic Capture & Netlist Verification
The schematic is drawn in Altium Designer or KiCad, organized by functional block: EMI filter → rectifier → PFC stage → main converter → secondary rectification → output filter → feedback/control. A netlist-vs-board audit ensures every connection matches. We run DRC for creepage/clearance violations against the applicable safety standard (IEC 62368-1 or IEC 60950-1).
5. Gerber & Fabrication File Output
Final deliverables include Gerber RS-274X, drill files (Excellon), stackup specification, impedance targets (if applicable), and an IPC-2581 or ODB++ package on request. The BOM is delivered as a structured spreadsheet with distributor links and alternates.
6. Optional: Prototype Validation
For high-reliability applications, we can order a prototype run and bench-test output voltage regulation, ripple (target < 50 mV p-p on a 12 V rail), efficiency, and thermal performance against the original board.
Cost Ranges for Power Supply PCB Reverse Engineering
| Board Complexity | Component Count | Layers | Price Range (USD) | Standard Lead Time |
|---|---|---|---|---|
| Simple adapter / charger | < 50 | 1–2 | $600 – $1,200 | 5–7 working days |
| Mid-range SMPS (100–500 W) | 50–200 | 2–4 | $1,200 – $3,000 | 7–10 working days |
| High-power / multi-output PSU | 200–500+ | 4–8 | $3,000 – $7,500 | 10–15 working days |
| Potted or conformal-coated add-on | — | — | +$200 – $800 | +1–3 days |
Prices depend on layer count, component density, and whether magnetic characterization is needed. Rush service (3–5 day turnaround) is available at a 30–50% premium through our expedited engineering queue.
Common Failure Modes We Encounter
Understanding what goes wrong on power supply boards helps explain why certain recovery steps take longer:
- Burnt traces near current-sense resistors. Copper may be vaporized around a 10–50 mΩ shunt. We reconstruct the trace geometry from adjacent layer patterns and the schematic context.
- Delaminated inner layers from thermal cycling. On 4+ layer boards running sustained loads above 80 °C, inner copper can separate from prepreg. Micro-sectioning is the only reliable way to image these layers.
- Erased IC markings. Some OEMs sand or laser-etch controller IC markings. We identify the part by pinout mapping, decap if necessary, and cross-reference against known PWM controller families (e.g., UC384x, NCP1200, ICE-series from Infineon).
- Custom-wound transformers with no data. We characterize primary inductance, leakage, turns ratio, and winding configuration. If the core is a standard size (EE, EFD, PQ), we generate a full winding specification for reproduction.
Who Needs Power Supply Board Recovery?
The request typically comes from three groups:
- Industrial maintenance teams keeping legacy equipment running when the PSU module is discontinued—CNC machines, medical devices, telecom rectifiers.
- Product companies that outsourced PSU design to a contract house and lost access to the original files after the relationship ended.
- Engineers redesigning for compliance or cost who need a baseline schematic to modify. If your goal is a layout change—say, adapting to a new form factor or swapping connectors—our PCB layout modification service can follow directly from the reverse-engineered data.
Related power-electronics projects we handle include motor drive power stage recovery and solar inverter board documentation, which share many of the same high-voltage and magnetics challenges.
Deliverable Formats at a Glance
| Deliverable | Format | Included by Default |
|---|---|---|
| Schematic | Altium .SchDoc / KiCad .kicad_sch / PDF | Yes |
| Gerber fabrication set | RS-274X + Excellon drill | Yes |
| Bill of Materials | Excel (.xlsx) with MPN, distributor links, alternates | Yes |
| Stackup specification | PDF / IPC-2581 | Yes (multi-layer) |
| Transformer winding spec | PDF drawing | Yes (if magnetics present) |
| ODB++ / IPC-2581 package | Native | On request |
| Prototype validation report | PDF with scope captures | Optional add-on |
Can you reverse engineer a potted or encapsulated power supply?
Yes. We routinely de-pot silicone- and epoxy-encapsulated modules. Silicone potting is removed chemically in 4–12 hours. Hard epoxy requires mechanical grinding under magnification, which adds 1–3 working days and $200–$800 depending on board size. Traces under hard potting occasionally sustain micro-damage; we verify continuity post-removal and note any reconstructed connections in the deliverables.
What if the PWM controller IC markings are sanded off?
We identify unmarked ICs by mapping pin functions (VCC, FB, COMP, gate drive, CS) against known controller families. If pinout matching is inconclusive, we decapsulate the die and compare the silicon to reference images. Success rate on common topologies (flyback, LLC) exceeds 90%. Exotic or fully custom ASICs may require a functional analysis loop that adds 3–5 days.
How accurate are the recovered Gerber files?
Trace width and spacing accuracy is ±0.05 mm (±2 mil) for standard resolution boards. Drill locations are accurate to ±0.1 mm. High-voltage isolation gaps are dimensioned against the applicable safety standard and flagged if they fall below minimum creepage. We provide a deviation report noting any areas where the original board showed manufacturing variance beyond our measurement tolerance.
Do you handle UL/CE compliance for the cloned board?
We do not perform safety certification, but we ensure the recovered design preserves all safety-critical dimensions, component selections, and isolation distances required by IEC 62368-1 or IEC 60950-1. This gives your certification lab a compliant baseline to test against, significantly reducing re-certification effort.
What is the minimum information you need to start?
One working or non-working sample board is sufficient. If you have a second sample, it helps us verify component values on damaged sections. Ship the board with basic context—input voltage range, output specs if known, and the reason for the project. We return the sample after the project unless destructive analysis (cross-sectioning) is required.
Check feasibility for your project
Send the chip marking or board details and tell us what you need to recover. Add clear photos if available.
Request a feasibility reviewWorking on a board like this?
Send the chip marking or two photos. You get feasibility, lead time and price within 24 hours, and the check costs nothing.
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