Bao'An Shenzhen China

SMT Assembly: Process, Specs & Pitfalls From Our Line

Sep 8, 2026  /  PCB COPY

smt assembly: Solder paste printing through an SMT stencil onto a bare PCB

What Is SMT Assembly?

SMT assembly (surface-mount technology assembly) is the process of placing and soldering electronic components directly onto the surface of a printed circuit board, without through-hole leads. It uses solder paste deposition, automated pick-and-place, and reflow soldering to populate boards at densities and speeds that through-hole insertion cannot match. A typical SMT line handles components down to 0201 (0.6 × 0.3 mm) packages and fine-pitch QFPs at 0.4 mm lead spacing, with placement accuracy within ±0.025 mm.

Why SMT Assembly Dominates Modern Electronics

smt assembly: Solder paste printing through an SMT stencil onto a bare PCB

Roughly 90% of the components on a modern PCBA are surface-mount. The reasons are straightforward: smaller footprints allow denser routing, shorter signal paths improve high-frequency performance, and automated placement runs 20,000–80,000 components per hour depending on machine class. Through-hole insertion still matters for high-mechanical-stress connectors or power devices, but SMT is the default for everything else.

When we receive boards from a board-plus-assembly recovery project, the placement data and BOM we extract feed directly into SMT programming. That continuity — from reverse-engineered Gerber and centroid files to a loaded pick-and-place — is what makes the process repeatable.

Step-by-Step SMT Assembly Process

1. Solder Paste Printing

A laser-cut stainless-steel stencil (typically 100–150 µm thick for standard pitches, 80–100 µm for fine-pitch below 0.5 mm) is aligned to the bare PCB. A metal squeegee forces solder paste — usually SAC305 (Sn96.5/Ag3.0/Cu0.5) for lead-free — through the apertures onto every pad. The critical parameter here is the area ratio: aperture width divided by stencil thickness. We keep it above 0.66 for reliable paste release; below that, you get insufficient deposits and opens after reflow.

Solder paste inspection (SPI) follows immediately. Our SPI system measures paste volume on every pad and flags any deposit outside ±30% of nominal. Catching a printing defect here costs seconds; catching it after reflow costs a rework station and risk of pad lift.

2. Component Placement

High-speed chip shooters handle passives (0201, 0402, 0603) while a multi-head fine-pitch machine places ICs, BGAs, and connectors. For a typical 400-component board, total placement takes under 30 seconds. Vision alignment corrects for PCB stretch and fiducial offset — our machines compensate to ±25 µm on X/Y and ±0.05° on theta.

Placement data comes from the centroid file (pick-and-place file). When original design data is unavailable, we generate this file during our reverse engineering workflow, extracting component coordinates and rotations from optical scans of the original board.

3. Reflow Soldering

The loaded board passes through a convection reflow oven with a multi-zone thermal profile. A standard lead-free profile looks like this:

Zone Temperature Range Duration Purpose
Preheat 150–200 °C 60–90 s Activate flux, equalize thermal mass
Soak 200–217 °C 60–120 s Reduce ΔT across board, prevent tombstoning
Reflow (TAL) 235–250 °C peak 40–70 s above liquidus (217 °C) Form solder joints
Cooling 250 → 100 °C ~4 °C/s max rate Solidify joints, prevent thermal shock

Peak temperature is the single most abused parameter. Too low (below 235 °C) and you get cold joints on thermal-relief pads; too high (above 260 °C) and you risk delamination on FR-4 boards with Tg below 170 °C. We profile every new board design with thermocouples on the heaviest ground pad and on the thinnest trailing edge — the ΔT between those two points must stay below 10 °C during TAL.

4. Inspection and Test

After reflow, every board passes through automated optical inspection (AOI). Our AOI catches solder bridges, tombstoned passives, missing components, and polarity reversals. For BGA and QFN packages where joints are hidden, we use 2D X-ray inspection — checking for head-in-pillow, voiding above 25%, and bridging under the package body.

Functional test or in-circuit test (ICT) follows AOI depending on the project. For cloned boards, we run a side-by-side comparison against the original, which ties into our accuracy verification workflow.

Common SMT Assembly Defects and Root Causes

Defect Typical Root Cause Prevention
Tombstoning (passives stand on end) Unequal paste volumes or pad sizes; uneven heating Balanced pad geometry, slower preheat ramp
Solder bridging Excess paste, stencil aperture too wide, misalignment Reduce aperture by 10%, verify SPI volumes
Head-in-pillow (BGA) Board warpage during reflow, oxidized balls Nitrogen reflow, board support pins, fresh components
Voiding (>25% area) Flux outgassing trapped under QFN pad Windowed stencil apertures, vacuum reflow
Cold/insufficient joint Low peak temp, exhausted paste, poor wetting Re-profile, check paste age (<6 h open time)

IPC-A-610 Class 2 accepts voiding up to 25% on BGA balls and up to 50% on thermal pads. Class 3 (military/medical) tightens those limits. We default to Class 2 and move to Class 3 on request — the practical difference is roughly 15–20% more inspection time and a tighter rework protocol.

Design-for-Assembly Rules That Save Runs

Pick-and-place nozzle positioning a surface-mount component during SMT assembly

Most SMT assembly problems originate in layout, not on the line. Here are the DFA constraints our engineers enforce before we accept a board for production:

  • Component-to-edge clearance: ≥3 mm from board edge, ≥5 mm from breakaway tab, to avoid damage during depaneling.
  • Fiducial marks: At least 2 global fiducials (1 mm diameter copper circle with 2 mm clearance) plus local fiducials on fine-pitch ICs (≤0.5 mm pitch).
  • Pad-to-pad spacing: Minimum 0.2 mm solder-mask dam between adjacent pads to prevent bridging.
  • Thermal relief on ground pads: Large copper pours connected through 4-spoke reliefs, not solid connections, or the pad won’t reach liquidus during reflow.
  • Component orientation: Passives aligned in the same direction along the reflow travel axis to equalize heating and reduce tombstoning.

When we generate assembly data from a BOM derived from Gerber data, we cross-reference every footprint against these rules and flag violations before fabrication.

SMT Assembly After Reverse Engineering: The Bridge

A reverse-engineered board is useless if it cannot be assembled reliably. The deliverable set from our engineering team — Gerber files, centroid/placement data, BOM with manufacturer part numbers, and stencil Gerber — is specifically structured so that any competent SMT line can load it without manual interpretation. That is the difference between a pile of files and a production-ready data package.

For projects that include firmware-bearing ICs, the assembly step also involves programming. If the original MCU’s flash needs to be read out and re-programmed onto new parts, that work happens before or after reflow depending on the package. We cover the technical side of protected firmware recovery in our guide on chip decryption feasibility and methods.

What Our SMT Line Handles

Capability Specification
Smallest passive 0201 (metric 0603)
Finest pitch IC 0.3 mm (QFP, CSP)
BGA ball pitch 0.4 mm minimum
Board size range 50 × 50 mm to 510 × 460 mm
Board thickness 0.4–3.2 mm
Reflow atmosphere Air or nitrogen (≤500 ppm O₂)
Solder paste SAC305 (lead-free default), Sn63/Pb37 on request
Inspection SPI, AOI, 2D X-ray
Batch size 1 pc prototype to 5,000 pc short-run

For a complete end-to-end service — bare board fabrication, component sourcing, SMT population, and functional test — see our populated board assembly service.

Turnaround and Pricing Signals

SMT assembly turnaround depends on BOM availability more than line time. A 200-component board with all parts in stock assembles in 3–5 working days. Extended-lead components (certain automotive-grade MLCCs, specialty connectors) can push that to 3–4 weeks. Pricing starts around $0.02–$0.04 per joint for standard runs; fine-pitch BGA rework or nitrogen reflow adds a premium. We quote per-board after reviewing the BOM and centroid file.

What file formats does SMT assembly require?

At minimum: Gerber files (RS-274X or Gerber X2), a centroid/pick-and-place file (CSV or ASCII with X, Y, rotation, side, and reference designator), a BOM with manufacturer part numbers, and a stencil Gerber for paste layer. IPC-2581 packages that bundle all of these are also accepted.

Can you assemble boards from reverse-engineered data?

Yes. Our reverse engineering output includes production-ready Gerber, centroid, and BOM files specifically formatted for direct loading into SMT placement machines. The data goes through DRC and DFA checks before release.

What is the difference between IPC Class 2 and Class 3 assembly?

Class 2 (dedicated service electronics) permits slightly larger voids, minor solder wicking, and wider cosmetic tolerances. Class 3 (high-reliability) tightens every criterion — smaller acceptable voids, no solder balls over 0.13 mm, and 100% X-ray on BGAs. Class 3 increases inspection time by roughly 15–20%.

How small a component can your SMT line place?

We routinely place 0201 (0.6 × 0.3 mm) passives and 0.3 mm-pitch CSP packages. Below 0201 — such as 01005 — requires specialized stencil technology and is handled on a case-by-case basis.

Do you handle mixed SMT and through-hole assembly?

Yes. Through-hole components are inserted after SMT reflow, then soldered by selective wave or hand soldering. We keep through-hole parts on the bottom side when possible to avoid a second reflow pass.

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