If you have a dead board out of an oscilloscope, a bench DMM, a data acquisition chassis, a spectrum analyzer, or a legacy calibrator, a test and measurement PCB copy gives you back a manufacturable set of files — Gerbers, drill data, netlist, BOM, and a schematic if you want one — reconstructed from the physical board. Send photos and the board itself, and you get a feasibility answer, a lead time, and a price before any work starts. Everything runs under NDA.
What makes instrumentation boards different from ordinary board duplication
Most industrial boards care about whether a signal is a logic 1 or a 0. Test and measurement boards care about whether a signal is 1.0000 V or 1.0002 V. That changes what has to be copied faithfully and what can be treated loosely.
On a DMM front end or an ADC input stage, the physical layout is part of the specification. Guard traces around high-impedance nodes, the shape of the ground pour under a sensitive integrator, the deliberate slot in the plane between analog and digital sections, the length matching on a differential ADC clock — all of it affects the measurement. So on this class of board we treat the copper geometry as functional rather than cosmetic, and we don’t “clean up” a layout that looks odd. If the original designer left a 3 mm keep-out around a reference IC, the copy keeps it.
The other difference is the parts. Instrument boards are full of components that a generic BOM pass gets wrong: 0.01% thin-film resistor networks, hermetic buried-zener references, low-tempco polypropylene caps, matched JFET pairs, laser-trimmed dividers. Reading “10K” off a package and specifying a 1% chip resistor will produce a board that powers up, passes a continuity check, and drifts out of spec in an hour. Identifying tolerance and temperature coefficient — not just value — is a real part of the job on these projects.
Board classes we see most often
- Analog front ends and input attenuators — relay-switched dividers, protection networks, precision resistor arrays. Usually 4 to 6 layers, moderate density, high care factor.
- ADC/DAC and timebase boards — controlled impedance, length-matched clock distribution, sometimes 8 layers or more with buried vias.
- RF sections in spectrum analyzers, network analyzers, and signal generators — often on PTFE or hydrocarbon laminate rather than FR-4, with dielectric constant and thickness that must be identified, not guessed.
- DAQ and multiplexer cards — dense but conventional, lots of relays and instrumentation amps, generally the fastest class to turn around.
- Controller and display boards — the easy part electrically, but usually the board holding the MCU with the firmware nobody has anymore.
What actually happens to your board, step by step
Nothing here is exotic. It’s disciplined and it’s checkable, which matters more.
- Intake and documentation. High-resolution scans of both sides before anything is touched, plus dimensional measurement of outline, mounting holes, and connector positions against the original mechanical fit. Silkscreen and any hand-written rework notes get captured now, because they disappear later.
- Non-destructive imaging first. X-ray for inner-layer routing under BGAs and for via structures, so we know the stackup before we commit to any destructive step. On instrument boards this is also how we find the shield cans and internal ground stitching patterns.
- Component identification. Every part gets read, cross-referenced, and where markings are house-coded or sanded, characterized electrically. Precision passives are measured, not assumed. Obsolete parts get flagged with a candidate replacement and a note on what changes.
- Layer separation. Copper layers are exposed one at a time and imaged, then vectorized. Dielectric thicknesses and copper weights are measured so the stackup and impedance targets can be rebuilt rather than invented.
- Netlist reconstruction and cross-check. The net list pulled from the layered images is compared against continuity measurements taken on a second physical sample. Disagreements get resolved by looking again, not by voting.
- File generation and DFM review. Gerbers, drill files, pick-and-place, BOM, and optionally a readable schematic. Trace widths get sanity-checked for current density against IPC-2152 guidance, and clearances against the spacing tables in IPC-2221 — relevant here because attenuator boards routinely carry a few hundred volts on a 1206 footprint.
- Verification build. A bare board is fabricated to IPC-A-600 / IPC-6012 Class 2 or Class 3 as you specify, assembled, and functionally compared to the original where a comparison is possible.
If you want the generic version of this workflow with every file explained, our step-by-step PCB copy process walks through the deliverable set in more detail.
Firmware, calibration constants, and the part everyone forgets
A copied instrument board that boots but reads garbage is usually a calibration problem, not a layout problem. Test and measurement gear stores gain and offset correction factors, ADC linearity tables, and sometimes the unit’s serial identity in an EEPROM or in the MCU’s data flash. Those numbers belong to that specific analog hardware. Copy the board, populate a fresh EEPROM, and the instrument has no idea what it’s measuring.
So on instrumentation projects we handle three things separately:
| What’s stored | Where it usually lives | How it’s handled on a copy |
|---|---|---|
| Executable firmware | MCU/DSP internal flash, sometimes external NOR | Read out if you hold the rights; otherwise you supply the hex |
| Calibration constants | 24Cxx / 93Cxx EEPROM, MCU data flash, or a dedicated serial flash | Read from the original board and reloaded, or regenerated by re-calibrating |
| FPGA/CPLD configuration | Configuration flash or the device’s own fuse array | Read where the security setting permits; harder than plain flash |
Reading a plain unprotected serial EEPROM is routine. Recovering firmware from a protected MCU is a separate engagement with its own feasibility assessment — an STM32 at RDP Level 1 behaves very differently from one at Level 2, an MSP430 with a blown JTAG fuse is a different problem again, and older 8051-family parts with set lock bits sit somewhere else on the difficulty curve. We’ll tell you which situation you’re in after we see the marking, and our notes on how read-out protection works explain why the marking matters so much.
One practical note: pull and archive the calibration EEPROM data from your working units now, before more of them die. It costs almost nothing today and is unrecoverable once the last good board fails.
What to send us for a Test and Measurement PCB Copy quote
Getting a real number instead of a vague range takes about five minutes on your end.
- Photos of both sides, whole board in frame, on a dark background, camera square to the board, good even light. No flash glare on the solder mask.
- Board dimensions — length, width, thickness — and your best guess at layer count.
- The main chip markings, typed out or in a close-up shot. MCU, ADC, and any house-numbered part.
- The instrument model and what it does, one line. Knowing it’s a 6.5-digit DMM input board versus a 100 MHz timebase changes how we scope the work.
- Which deliverables you need — files only, files plus a schematic, or files plus assembled and tested boards.
- How many spare units you have. Two boards is much better than one; a second sample makes netlist verification real instead of theoretical.
Back from us: a feasibility statement naming anything we’re unsure about, a lead time, a price, and a list of exactly which files are included. Nothing destructive happens to your board until you’ve approved that. Layer count, board area, component count, BGA presence, and whether firmware is in scope are what move the price — the same drivers described in our breakdown of what a board copy costs.
Where this gets harder, and where we’ll tell you no
Honest constraints, because you’d rather hear them now.
Potted and shielded modules. Precision reference modules and some RF blocks are potted in opaque epoxy or sealed in soldered cans. We can often get inside, but sometimes the extraction damages the thing we needed to characterize. On a one-of-one sample that’s a real risk and we’ll say so before proceeding.
House-numbered analog parts. Instrument makers relabel op-amps, references, and custom resistor networks. Sometimes electrical characterization identifies a commercial equivalent. Sometimes the part is a genuine custom die or a trimmed hybrid with no drop-in replacement, and the honest answer is that the board can be reproduced but that one function needs a redesigned equivalent circuit.
Unknown laminate on RF boards. We can measure thickness and estimate Dk from the geometry and known impedance, but if the original used a specific PTFE composite that’s now discontinued, matching it exactly may not be possible. That affects RF performance, not DC function.
ASICs and custom silicon. A copy reproduces the board. It does not reproduce a proprietary ASIC. If the part is unobtainable, the project becomes a redesign around available silicon, which is a different scope and a different price.
Single damaged sample. A cracked, heavily corroded, or fire-damaged board with no second copy limits what can be verified. We’ll still often get you most of the way there — but we won’t claim a verified netlist we couldn’t verify.
On rights: you’re responsible for holding the rights to the design you send and for complying with appl
Working on a board like this?
Send the chip marking or two photos. You get feasibility, lead time and price within 24 hours, and the check costs nothing.
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