28 Layer PCB Copy | Stackup Recovery & Lead Time

28 Layer PCB Copy: Recovering Every Signal and Power Plane

A 28 layer PCB copy produces a complete Gerber set, BOM, and stackup specification from a physical board—typically a telecom switch fabric, high-performance computing backplane, or advanced radar processor. Our engineers de-layer the board, image all 28 copper layers at ≥2400 dpi, reconstruct impedance-controlled routing, and deliver fabrication-ready files verified against the original. Turnaround for a 28 layer PCB copy runs 18–25 working days depending on board area and via complexity.

Why a 28 Layer PCB Copy Is Harder Than Standard Reverse Engineering

At 28 layers you are well past the threshold where standard cross-section and optical methods alone can resolve every feature. Three factors compound the difficulty:

• Dense via structures. A typical 28-layer design uses stacked microvias (layers 1–3 and 26–28), buried vias spanning mid-layer groups (e.g., L4–L14), and through-hole vias. Mapping which via connects which layer pair requires sequential micro-sectioning at multiple board locations—often 20+ cross-section points per board.
• Thin dielectric tolerances. With 28 copper layers the total board thickness is usually constrained to 3.0–4.5 mm (120–180 mil). Individual prepreg layers may be as thin as 2.0 mil (50 µm), and a 10% thickness error changes impedance by 3–5 Ω on a 50 Ω trace. Accurate dielectric measurement is non-optional.
• Multiple impedance domains. High-speed differential pairs at 100 Ω ± 7%, single-ended 50 Ω microstrip on outer layers, and stripline at 50 Ω on inner layers all coexist. Each domain must be identified and matched in the recovered stackup.

These constraints mean a 28 layer PCB copy takes roughly 2–3× the engineering hours of a 12-layer board with dense buried via mapping, and demands tighter quality gates at every stage.

What Does the 28 Layer PCB Copy Process Look Like?

Step 1 — Incoming Inspection and Photography

We photograph both outer layers at high resolution, catalog all components for the BOM, and record board dimensions, mounting holes, and fiducials. If the board carries BGAs with 0.4 mm pitch (common on 28-layer networking boards), we X-ray those areas before de-soldering to capture pad-to-via relationships.

Step 2 — Component Removal and BOM Generation

All components are removed, catalogued by reference designator, and cross-referenced against distributor databases. For obsolete or custom-marked parts, we measure packages and, where authorized, read part markings under UV to recover manufacturer codes.

Step 3 — Sequential De-Layering

Chemical and mechanical milling strips one copper layer at a time. Each exposed layer is scanned at 2400–4800 dpi. Alignment targets (tooling holes, fiducials, or unique pad patterns) register every image to a common coordinate system with ≤0.5 mil (12.7 µm) positional accuracy. For a 28-layer board this means 28 imaging passes plus solder mask and silkscreen captures.

Step 4 — Via Mapping

Our engineers build a via matrix identifying every via type: through-hole, blind (L1–L3, L26–L28), buried (e.g., L4–L14, L15–L25), and stacked micro (L1–L4). Each via type is assigned a unique drill file. On a recent 28 layer PCB copy project for a switch-fabric board (420 × 300 mm), we identified 11 distinct via span types—far above the 3–4 types typical of an 8-layer impedance-controlled design.

Step 5 — Stackup Reconstruction and Impedance Modeling

Cross-sections measured with a calibrated optical microscope give us copper weights (typically 0.5 oz inner, 1 oz outer), dielectric thicknesses, and material type (usually Megtron 6 or IS415 for boards at this layer count). We model the stackup in a 2D field solver and verify that calculated impedance values fall within the tolerance window measured by TDR on the original board.

Step 6 — Gerber Output, DRC, and Verification

Vectorized Gerber RS-274X files, an Excellon drill file set, an IPC-D-356 netlist, and a stackup drawing are generated. A full DRC checks minimum trace/space (often 3.0/3.0 mil on inner layers, 3.5/3.5 mil on outer), annular ring, and clearance. We overlay the recovered Gerber on the original scan images as a final visual check.

Typical Stackup for a 28-Layer Board

The exact arrangement varies by application. Networking boards often concentrate differential pairs on L5–L10 and L19–L24, while radar and military designs may place shielding planes between every signal pair. Our engineers recover the actual arrangement—they do not assume a textbook stackup.

Cost and Lead Time for a 28 Layer PCB Copy

Pricing scales primarily with board area and via-type count. A compact 28-layer module (100 × 80 mm) with 4 via types sits near the low end; a full-size backplane with 10+ via types and 2000+ unique nets is at the high end. We provide a firm quote within 48 hours of receiving the board or high-resolution photos.

Common Failure Modes and How We Mitigate Them

• Layer misregistration during de-layering. If one scan shifts even 1 mil, net connectivity breaks. We use redundant alignment marks and verify connectivity against TDR/continuity measurements on the original board.
• Dielectric ambiguity. At 28 layers, two adjacent prepreg sheets may differ by only 0.5 mil. We take at least 6 cross-section measurements per dielectric layer and average them.
• BGA escape routing errors. High-pin-count BGAs (2500+ balls) on inner layers can create routing so dense that automated vectorization misreads trace-to-via connections. Our engineers manually verify BGA breakout zones against X-ray images.
• Buried via misidentification. A via that appears to span L4–L14 might actually stop at L12. Sequential de-layering catches this, but only if the operator inspects every transition layer.

How Does a 28 Layer PCB Copy Compare to Adjacent Layer Counts?

If your board is slightly simpler, a 24-layer telecom and backplane recovery follows a similar process but with fewer via types and a shorter lead time (15–20 days). For designs that push beyond 28 layers—such as high-end FPGA carrier boards—our 32-layer board reverse engineering service adds additional cross-section density and extended impedance verification.

On the simpler end, many engineers start with a 10-layer board with additional signal pairs to validate our process before committing a high-value 28-layer original.

Who Needs a 28 Layer PCB Copy?

• Telecom OEMs maintaining legacy switch-fabric or line-card designs where the original design house no longer exists.
• Defense contractors performing DMSMS (Diminishing Manufacturing Sources and Material Shortages) mitigation on radar or electronic warfare modules.
• Data-center operators needing spare boards for server or storage backplanes that are no longer in production.
• Test-equipment manufacturers reverse engineering proprietary high-speed digitizer or signal-generator boards for repair support.

For boards used in communication system PCB cloning, we routinely handle controlled-impedance designs with SERDES lanes running at 25 Gbps and above.

Frequently Asked Questions About 28 Layer PCB Copy

How many sample boards do you need for a 28 layer PCB copy?

We require a minimum of two identical boards—one for de-layering (destructive) and one as a reference for continuity testing and TDR impedance measurement. If only one board is available, we can proceed but will note that post-verification options are limited. Three boards are ideal for complex designs with 10+ via types.

Can you recover the schematic from a 28-layer board, not just the Gerber files?

Yes. Schematic recovery is offered as an add-on and typically adds 30–50% to the base cost and 5–10 additional working days. The schematic is generated from the recovered netlist and organized by functional block (power supply, clock distribution, high-speed interface, etc.).

What materials do you encounter in 28-layer boards?

Most 28-layer boards use low-loss laminates: Panasonic Megtron 6 (Dk ≈ 3.4 at 10 GHz), Isola IS415 (Dk ≈ 3.5), or Rogers RO4000 series for mixed-dielectric builds. Standard FR-4 is rare at this layer count because its loss tangent (≈0.020) degrades signals on long inner-layer traces. We identify the material via cross-section color, Dk measurement, and manufacturer markings on the board edge.

Is the 28 layer PCB copy process the same for rigid and rigid-flex boards?

Not quite. Rigid-flex 28-layer designs (uncommon but found in some military avionics) require separate handling of the flex zones—polyimide cores flex differently under chemical de-layering. We adjust our process chemistry for those regions and image them independently before merging into the unified Gerber set.

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