High Density PCB Copy | Where the Hard Parts Are

What Makes High Density PCB Copy So Difficult?

High density PCB copy is the process of reverse-engineering an HDI (High Density Interconnect) board—typically 8 to 20+ layers with microvias, stacked or staggered via structures, and trace/space geometries below 3 mil (75 µm)—back into a complete, fabrication-ready data package. The difficulty isn’t any single feature; it’s the compounding of tight tolerances across every layer simultaneously, where a 0.5 mil registration error on layer 4 can cascade into a dead net on layer 12.

Most PCB copy services can handle 2-layer or even 4-layer boards with 6/6 mil trace/space. HDI is a different category. Below, we document where things actually go wrong, what our process looks like, and the tolerances we hold.

Why Standard Copy Methods Fail on HDI Boards

A conventional PCB copy workflow—scan, threshold, auto-trace—breaks down on high density boards for specific, measurable reasons:

• Microvia detection: Laser-drilled microvias as small as 4 mil (100 µm) diameter sit beneath solder mask or within buried layers. Optical scanning alone misses buried and stacked vias entirely.
• Layer-to-layer registration: HDI boards use sequential lamination. Each lamination cycle introduces registration shift, typically ±1.5 mil. Reverse-engineering must reconstruct the design intent, not the as-built drift.
• Pad-on-via ambiguity: Via-in-pad designs (IPC-4761 Type VII) make it impossible to distinguish a pad from a via without cross-sectioning or X-ray inspection.
• Impedance-critical routing: Differential pairs at 85 Ω or 100 Ω on inner layers require not just trace width extraction but dielectric thickness measurement to ±0.5 mil to reconstruct the original stackup intent.
• Fine-pitch BGA escape: 0.4 mm pitch BGAs demand dog-bone fanout patterns with 2/2 mil trace/space on the first routing layer. Missing a single via assignment orphans an entire net.

Our High Density PCB Copy Process — Step by Step

1. Non-Destructive Inspection

Before any delamination, we X-ray the board to map every via structure—through-hole, blind, buried, stacked, staggered. This gives us the via architecture before we remove a single layer. On boards with 3+ sequential lamination cycles, X-ray is the only way to distinguish a stacked microvia from a single deep drill.

2. Controlled Layer Stripping

We chemically strip copper and mechanically separate prepreg layers one at a time. Each exposed copper layer is scanned at 4800 DPI minimum—often 9600 DPI for sub-3-mil geometry. We photograph registration marks on every layer to build a global alignment model.

3. Image Processing and Vectorization

Raw scans are processed with adaptive thresholding tuned per layer (copper color shifts with oxidation and etchback). Our engineers manually verify every net on BGA escape layers—automated trace extraction has a typical error rate of 2–5% on 2/2 mil geometry, which is unacceptable for production data.

4. Stackup Reconstruction

We measure each dielectric layer thickness with a micrometer (±0.1 mil resolution) and identify materials through TGA or cross-section analysis. This is critical: getting the dielectric constant wrong by even 0.2 shifts a 100 Ω differential pair out of spec.

5. Netlist Verification

The reconstructed Gerber set is run through DRC and compared against a netlist extracted from the physical board using flying-probe continuity testing. Every net must match. On a typical 14-layer HDI board with 3,000+ nets, this step takes 2–3 working days alone.

6. Deliverable Generation

Final output includes Gerber RS-274X (or ODB++), drill files with separate definitions for laser and mechanical drills, a stackup drawing with material callouts, impedance targets, and a BOM if components are still populated.

Tolerance and Capability Reference

Where High Density PCB Copy Gets Expensive — and Why

HDI copy projects typically run 3–8× the cost of a standard multilayer copy. The cost drivers are real:

• Destructive process: The original board is consumed during layer stripping. If you only have one sample, there’s no second chance. We recommend sending two boards when possible—one for stripping, one for reference and electrical testing.
• Manual verification hours: On a 16-layer board with 0.5 mm pitch BGAs, our engineers spend 40–80 hours on manual trace verification alone. This isn’t optional—it’s where copy accuracy goes from 95% (unusable) to 99.9%+ (production-ready).
• X-ray and cross-sectioning: Non-destructive inspection adds equipment time but saves rework. A single missed stacked via can mean a dead board after fabrication.
• Material identification: HDI boards often use specialized laminates—Megtron 6, IS410, or high-Tg materials rated above 170 °C. Identifying the correct material affects both impedance and reliability.

Typical turnaround for a high density PCB copy project: 10–20 working days depending on layer count and BGA complexity. Rush service is available but adds cost because it compresses the verification window, not the physics.

HDI vs. Other Complex Board Types

High density interconnect boards share challenges with several other board categories, but the combination is unique:

Common Failure Modes We’ve Seen

Over hundreds of HDI copy projects, these are the recurring failure modes when boards are copied without proper HDI methodology:

• Stacked via misidentified as through-hole: The fabricator drills a single mechanical hole instead of building sequential laser vias. The board shorts on inner layers.
• Incorrect aspect ratio on microvias: A 4-mil via on a 4-mil dielectric (1:1 aspect ratio) is at the edge of reliable laser drilling. If the copy data specifies a 3-mil dielectric, the fab may reject it or produce unreliable vias.
• Impedance mismatch from wrong dielectric constant: Substituting FR-4 (Dk ≈ 4.2) for Megtron 6 (Dk ≈ 3.6) shifts a 100 Ω differential pair to roughly 92 Ω—enough to cause signal integrity failures on 5+ Gbps links.
• Missing back-drill callouts: Many HDI boards use back-drilling to remove via stubs on high-speed nets. If the copy data omits these callouts, stub resonance degrades signal integrity at frequencies above 3 GHz.

Which Industries Need High Density PCB Copy Most?

HDI boards appear across sectors, but the copy demand concentrates where legacy support and small-batch reproduction intersect:

• Medical devices: Implantable and diagnostic equipment often uses 12–16 layer HDI boards that went end-of-life with the original manufacturer. See our work on medical device PCB reproduction.
• Industrial controls: PLC and motion-control modules from the 2005–2015 era increasingly used HDI. Replacement boards are unavailable; copying is the only path to continued production support.
• Automotive ECUs: Engine and transmission controllers with 0.5 mm pitch BGAs on 10+ layer HDI stackups. These boards must match the original impedance profile exactly or risk CAN-bus communication failures.

Frequently Asked Questions

Related reading

• Oct 2026NXP IC Unlock | Families We Can Read & Recovery
• Oct 2026ATSAM3 Unlock | Feasibility, Cost & Lead Time
• Oct 2026MSP430 IC Unlock | Which Families We Can Read