SAMD10 Unlock | Feasibility, Cost & Turnaround

SAMD10 Unlock: Recovering Firmware from Microchip’s Compact Cortex-M0+

A SAMD10 unlock extracts protected firmware from Microchip’s ATSAMD10 series — a single-supply, 48 MHz ARM Cortex-M0+ microcontroller with 4–16 KB flash. Our engineers recover the flash contents through a combination of debug-interface techniques and, where necessary, semi-invasive fault injection, achieving successful readout on the majority of SAMD10 variants when the security bit (BOOTPROT + LOCK + Security Bit in NVM User Row) is the only protection layer in play.

What Protection Does the SAMD10 Use?

The ATSAMD10 relies on Microchip’s SAM D-series NVM security model, which is simpler than the TrustZone-backed schemes found in later SAM L or SAM E families. Understanding the specific mechanism matters because it determines both the attack surface and the realistic success rate.

Security Bit (NVM User Row, Bit 0)

When set, the Security Bit disables external read access via the SWD (Serial Wire Debug) interface. A debugger connecting to the DAP will see the device but cannot issue memory reads against flash or SRAM. This is the primary barrier in a SAMD10 unlock engagement.

BOOTPROT and Region Lock Bits

BOOTPROT reserves a configurable portion of flash (up to 8 KB on a 16 KB part) as a protected bootloader region. The LOCK bits further divide the remaining flash into individually lockable regions. These bits prevent inadvertent writes/erases but do not, on their own, block SWD readout — the Security Bit does that.

Chip Erase vs. Selective Erase

Microchip’s architecture allows a full chip erase even when the Security Bit is set — this is the intended “recovery” path that clears both flash and the security configuration. For firmware recovery, obviously, erasing is the opposite of what we need. Our task is to read the contents without triggering a chip erase.

Compared to the more advanced security on SAML21 devices with their TrustZone integration, the SAMD10’s protection is relatively straightforward, which is why feasibility rates trend higher for this family.

How Is a SAMD10 Unlock Performed?

We use a staged approach, escalating technique complexity only as needed. Every engagement begins with a non-destructive assessment.

Stage 1 — Debug Interface Probing

Our engineers connect to the SAMD10’s SWD port and query the Device Service Unit (DSU). We verify the exact part number (D10D14, D10C14, etc.), read the Device Identification register, and confirm whether the Security Bit is actually set. Roughly 10–15 % of parts we receive have the bit cleared — the original developer relied on BOOTPROT alone, and the firmware reads out directly.

Stage 2 — Glitch / Fault Injection

When the Security Bit is active, we apply voltage or clock glitching to the Cortex-M0+ core during the boot-time security-check window. The SAMD10’s single power domain (1.62 V – 3.63 V VDD) and lack of a separate analog regulator make it more susceptible to voltage glitching than parts with integrated LDOs. A precisely timed transient on VDD during the DSU security-flag evaluation can cause the core to skip the access-restriction branch, opening a brief SWD read window.

Stage 3 — Semi-Invasive (Rare)

On a small percentage of samples — typically parts with additional epoxy potting or where glitching repeatedly triggers brown-out resets — we decap the package and use focused light or EM fault injection. The SAMD10’s 65 nm process node is well-characterized for this approach, though it adds time and cost.

Feasibility by SAMD10 Variant

Not every SAMD10 part number responds identically. Flash size, package, and even silicon revision affect the glitch timing window.

Parts in WLCSP packages or those potted in conformal coating may require desoldering and individual handling, which lowers feasibility slightly and adds to turnaround.

Cost and Turnaround for SAMD10 Unlock

Pricing depends on the technique required and the number of samples.

We provide a free feasibility assessment before any paid work begins. If we determine the part cannot be read, you pay nothing.

What You Receive After a Successful SAMD10 Unlock

• Binary firmware image (.bin or Intel HEX) — full flash contents, 4–16 KB depending on variant.
• NVM User Row dump — includes fuse configuration, calibration data, and serial number bytes.
• Verification report — CRC32 checksum, read-back comparison across two independent extractions to confirm data integrity.
• Optional disassembly listing — ARM Thumb instruction set, annotated with vector table and peripheral register references (add-on service).

All deliverables are transferred via encrypted channel under NDA. We retain no copies after the agreed holding period (default: 30 days).

Authorization and Legal Requirements

We perform SAMD10 unlock only for authorized parties — original firmware owners, licensees with documented rights, or companies recovering their own legacy designs. Before work begins, we require proof of ownership or a signed authorization letter. This protects both parties and ensures compliance with IP law in your jurisdiction.

Common legitimate scenarios include recovering firmware from a discontinued product where the original source code was lost, duplicating your own design for a second manufacturing run, or analyzing a board you designed but whose developer is no longer available. If you need to understand how we handle IP protection and NDAs, review our SAML21 unlock page for a similar authorization workflow, or contact us directly.

SAMD10 vs. Related Microchip / ARM Families

Engineers sometimes ask whether the SAMD10 unlock process applies to other SAM or Cortex-M0+ parts. The short answer: the security architecture differs enough between families that each requires its own characterization.

• The SAME54 series adds a more complex NVM controller with secure boot and larger flash (up to 1 MB), making glitch timing significantly harder.
• RP2040 from Raspberry Pi uses a completely different OTP-based security model with no traditional debug lock bit.
• For engineers working with TI’s low-power MCUs, our MSP430F2 unlock service covers a JTAG fuse-blow protection scheme unrelated to ARM SWD.
• Chinese ARM alternatives like the AT32F403 use Artery’s own read-protection levels, which require different fault parameters.

Common Failure Modes and Honest Limitations

Transparency matters. Here is what can go wrong during a SAMD10 unlock attempt:

• Brown-out reset loop: Aggressive VDD glitching can trigger the BOD (Brown-Out Detector), resetting the core before the read window opens. We mitigate this by tuning glitch amplitude in 10 mV increments, but some boards with tight decoupling resist this approach.
• Damaged SWD pads: If the SWD clock or data lines are physically damaged or routed through an ESD protection IC that clamps our signals, we may need to micro-probe the die directly — adding cost.
• Partial reads: Occasionally the glitch opens a window long enough to read only a portion of flash. We concatenate multiple partial reads and verify integrity, but this extends turnaround.
• Newer silicon revisions: Microchip occasionally tightens glitch tolerance in new mask revisions without changing the part number. We maintain a revision log, but a previously successful technique may need re-characterization on a new revision.

Related IC Unlock Services

• PIC16F18 unlock — Microchip 8-bit PIC with code-protect fuse
• SAME54 unlock — higher-end SAM E5x Cortex-M4F family
• AT32F403 unlock — Artery ARM Cortex-M4 alternative
• RP2040 unlock — Raspberry Pi dual-core Cortex-M0+
• MSP430F2 unlock — TI ultra-low-power 16-bit MCU

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