Bao'An Shenzhen China

Schematic Capture Service | Cost and Lead Time

Sep 13, 2026  /  PCB COPY

schematic capture service: Engineer probing a PCB during schematic capture at a reverse-engineering workstation

What Is a Schematic Capture Service?

A schematic capture service reconstructs a complete, editable circuit schematic from a physical PCB assembly, bare board, or partial design notes. Our engineers visually trace every net, probe component values, identify ICs, and produce a hierarchical schematic in industry-standard EDA formats — typically Altium, KiCad, or OrCAD. The resulting file is annotation-ready, DRC-clean, and cross-referenced to a bill of materials. Most 2–6 layer boards ship in 5–15 working days, with pricing starting near $300 for straightforward single-sided designs.

Why You Need a Schematic When You Already Have the Board

schematic capture service: Engineer probing a PCB during schematic capture at a reverse-engineering workstation

Holding a working PCB is not the same as understanding its circuit. Without a schematic you cannot perform root-cause failure analysis, redesign around an obsolete component, or pass a design review for regulatory compliance. Schematics are also the fastest path to a clean Gerber regeneration — trying to modify a layout without understanding signal flow almost always introduces errors that surface only after fabrication.

Common scenarios where clients request schematic capture include:

  • Legacy product support — original design files lost or locked in a defunct EDA format.
  • Second-source qualification — verifying a contract manufacturer’s board matches the approved design.
  • Failure investigation — mapping current paths to locate a thermal or EMI issue.
  • Design migration — moving an old through-hole design to SMT or upgrading a microcontroller family.
  • IP documentation — creating formal records for boards originally prototyped without documentation.

Our Schematic Capture Process — Step by Step

1. Board Intake and Photography

We photograph every layer at 1200 DPI minimum using a calibrated scanner. For multi-layer boards we perform controlled delamination or X-ray imaging to expose internal copper. Each image is stitched and scaled to 1:1 dimensional accuracy (±0.05 mm).

2. Netlist Extraction

Using continuity testing and automated optical recognition, we extract every net from the board. Pad-to-pad connectivity is logged into a master netlist file. On dense BGA designs (0.4 mm pitch and below) we supplement with flying-probe verification to catch micro-vias hidden under packages.

3. Component Identification and BOM Generation

Every component is cataloged: manufacturer part number, package, value, and tolerance. Where markings are absent or sanded, we measure in-circuit (capacitance, resistance, inductance) and cross-reference parametric databases. The BOM is delivered as a structured spreadsheet with distributor cross-references.

4. Schematic Drawing

Our engineers organize the circuit into functional blocks — power supply, signal conditioning, digital core, I/O interfaces — and draw each block as a hierarchical sheet. We follow IPC-D-325 symbology conventions and annotate reference designators to match the physical board silk screen. Net names are assigned semantically (e.g., VCC_3V3, SPI_CLK, MOTOR_PWM) rather than auto-generated labels.

5. Design Rule Check and Client Review

The completed schematic passes an ERC (Electrical Rules Check) inside the EDA tool. We then issue a review package — PDF schematic, native project files, and BOM — for your engineering team to verify before final delivery.

Deliverable Formats

Deliverable Format Options Included by Default
Schematic (native) Altium .SchDoc / KiCad .kicad_sch / OrCAD .dsn Yes
Schematic (PDF) Multi-page, A3 or Letter Yes
Netlist IPC-D-356A / OrCAD / Altium netlist Yes
Bill of Materials .xlsx with MPN, value, package, qty, alternates Yes
High-res board images .TIFF / .PNG per layer Yes
Gerber / ODB++ (layout) RS-274X / ODB++ Add-on service

How Much Does a Schematic Capture Service Cost?

Pricing depends on layer count, component density, and whether the board contains programmable ICs that require additional identification effort. The table below gives realistic starting ranges based on our project history.

Board Complexity Layer Count Typical Component Count Price Range (USD) Lead Time (Working Days)
Simple 1–2 < 50 $300 – $600 5 – 7
Moderate 4 50 – 200 $600 – $1,500 7 – 12
Complex 6 – 8 200 – 600 $1,500 – $4,000 10 – 15
High-density / HDI 10+ 600+ $4,000 – $8,000+ 15 – 25

These ranges assume a single working sample board in good physical condition. Boards with corroded traces, missing components, or conformal coating add 15–30% to both cost and time. Rush delivery (≤ 5 days for moderate boards) is available at a 40% surcharge.

What Board Types Can We Capture Schematics From?

Our schematic capture service covers virtually every PCB substrate and construction. Specific board types we handle regularly include standard FR-4 rigid boards, flexible FPC assemblies where folded routing complicates net tracing, rigid-flex PCBs with mixed stackups, and heavy copper power boards carrying 3 oz+ planes that require thermal imaging to map internal layers accurately.

Specialty substrates like aluminum-core and metal-core boards used in LED lighting or motor drives are also within scope. For high-frequency designs on Rogers or PTFE laminates, we note controlled-impedance traces and annotate characteristic impedance targets directly on the schematic — critical data that generic capture services typically omit.

Industry-Specific Schematic Capture

Printed schematic pages and BOM spreadsheet alongside the original circuit board

Different sectors bring different challenges. IoT device boards often pack an RF front-end, MCU, and power management into a 25 × 30 mm footprint with 0201 passives, demanding microscope-level tracing. Motor control boards feature high-current gate-driver circuits where accurate capture of bootstrap and snubber networks is essential for safe reproduction. Test and measurement instrument boards require us to preserve guard rings, Kelvin connections, and analog ground splits in the schematic — details that affect measurement accuracy by orders of magnitude.

What Can Go Wrong — and How We Mitigate It

Schematic capture is not infallible. Transparency about limitations is part of our process:

  • Buried vias on 8+ layer boards: Internal connections invisible from the surface. We use X-ray cross-sectioning and micro-section samples when ambiguity exists. Accuracy on 10+ layer HDI boards is typically 98–99.5%, not 100%.
  • Unmarked or custom ASICs: If a chip has no public datasheet, we can map pin connectivity but cannot guarantee full functional annotation. We flag these clearly in the deliverable.
  • Component value drift: In-circuit measurements of aged components (especially electrolytics) may differ from original spec. We note measured vs. likely nominal values.
  • Conformal coating / potting: Removal adds time and risks trace damage on thin laminates. We discuss risk before proceeding.

Schematic Capture vs. Full PCB Reverse Engineering

Schematic capture produces the circuit diagram and BOM. Full reverse engineering adds Gerber files, drill files, stackup documentation, and optionally firmware readout. If your goal is board reproduction, you need both. If your goal is failure analysis, design audit, or component sourcing, the schematic alone is often sufficient — and costs roughly 40–60% of a full reverse-engineering project.

We offer both as standalone or bundled services. Bundled projects share the board-imaging and netlist-extraction steps, so the incremental cost of adding Gerber output to a schematic capture order is typically 30–50% above the schematic-only price.

Check feasibility for your project

Send the chip marking or board details and tell us what you need to recover. Add clear photos if available.

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Frequently Asked Questions

Can you capture a schematic from a damaged or partially populated board?

Yes, provided at least 80% of traces are intact and major ICs are identifiable. Missing passive components can usually be inferred from circuit topology and remaining markings. Severely burned or delaminated areas may result in gaps we flag as “unresolved nets” for your engineering team to complete.

What EDA format should I request for my schematic capture?

We recommend Altium Designer for teams that need tight Gerber integration, and KiCad for open-source workflows. OrCAD is available on request. Every project also ships with a multi-page PDF for quick reference. If you need a format not listed, let us know — we can export to most major EDA platforms.

How accurate is the BOM that comes with the schematic?

Manufacturer part numbers are confirmed for approximately 90–95% of components via marking cross-reference. The remaining 5–10% — typically unmarked discretes or custom-wound inductors — are specified by measured value and package dimensions with suggested equivalents.

Do I need to send more than one sample board?

One board is sufficient for most projects. For destructive delamination on boards above 6 layers, we recommend sending two samples — one for imaging and one as a reference. We will confirm sample requirements after reviewing your board photos during the intake stage.

Is my design kept confidential?

Every project is covered by our standard NDA. We do not retain, reuse, or share your schematic data after delivery. Completed project files are purged from our servers 90 days after final acceptance unless you request extended archival.

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